Nxp Semiconductors SA58670A Benutzerhandbuch

SA58670A_2

© NXP B.V. 2008. All rights reserved.

[1]

V

DD

 is the supply voltage on pins PVDD and pin AVDD.

T

amb

= 25

°

C; R

L

= 8

Ω

; unless otherwise specified

P

o

output power

per channel; f = 1 kHz; THD+N = 10 %

R

L

= 8

Ω

; V

DD

= 3.6 V

-

0.72

-

W

R

L

= 8

Ω

; V

DD

= 5.0 V

-

1.4

-

W

R

L

= 4

Ω

; V

DD

= 5.0 V

-

2.1

-

W

THD+N

total harmonic
distortion-plus-noise

V

DD

= 5.0 V; G

v(cl)

= 6 dB; f = 1 kHz

P

o

= 0.5 W

-

0.11

-

%

P

o

= 1.0 W

-

0.14

-

%

SVRR

supply voltage ripple
rejection

G

v(cl)

= 6 dB; f = 217 Hz

V

DD

= 3.6 V

-

−

73

-

dB

V

DD

= 5.0 V

-

−

77

-

dB

CMRR

common mode rejection
ratio

V

DD

= 5.0 V; G

v(cl)

= 6 dB; f = 217 Hz

-

−

69

-

dB

Z

i

input impedance

G

v(cl)

= 6 dB

-

28.1

-

k

Ω

G

v(cl)

= 12 dB

-

17.3

-

k

Ω

G

v(cl)

= 18 dB

-

9.8

-

k

Ω

G

v(cl)

= 24 dB

-

5.2

-

k

Ω

t

d(sd-startup)

delay time from
shutdown to start-up

V

DD

= 3.6 V

-

3.5

-

ms

V

n(o)

output noise voltage

V

DD

= 3.6 V; f = 20 Hz to 20 kHz;

inputs are AC grounded

no weighting

-

35

-

µ

V

A weighting

-

27

-

µ

V