Samsung S3C2440A Benutzerhandbuch

The interrupt controller in the S3C2440A receives the request from 60 interrupt sources. These interrupt sources 
are provided by internal peripherals such as DMA controller, UART, IIC, and others. In these interrupt sources, the 
UARTn, AC97 and EINTn interrupts are 'OR'ed to the interrupt controller. 

When receiving multiple interrupt requests from internal peripherals and external interrupt request pins, the 
interrupt controller requests FIQ or IRQ interrupt of the ARM920T core after the arbitration procedure. 

The arbitration procedure depends on the hardware priority logic and the result is written to the interrupt pending 
register, which helps users notify which interrupt is generated out of various interrupt sources. 

Request sources

(with sub -register)

Request sources

(without sub -register)

SRCPND

MASK

MODE

Priority

INTPND

IRQ

FIQ

SUBSRCPND

SUBMASK

LCD interrupt has different features. Please see the chapter 15 LCD Controller