Nokia 3105 Servicehandbuch
RH-48
System Module
CCS Technical Documentation
Page 10
©
2003 Nokia Corporation Confidential
Issue 1 11/2003
The Body consists of the NMP custom cellular logic functions. These contain all inter-
faces and functions needed for interfacing with other DCT4 baseband and RF parts. It
includes the following sub-blocks: MFI, SCU, CTSI, RxModem, AccIF, UIF, Coder, GPRSCip,
BodyIF, SIMIF, PUP, and CDMA (Corona).
faces and functions needed for interfacing with other DCT4 baseband and RF parts. It
includes the following sub-blocks: MFI, SCU, CTSI, RxModem, AccIF, UIF, Coder, GPRSCip,
BodyIF, SIMIF, PUP, and CDMA (Corona).
NOR Flash Memory and SRAM
This device is a 128Mbit Muxed Burst Multi Bank Flash and 8Mbit Muxed fCMOS SRAM
combined in a Multi Chip Package Memory.
combined in a Multi Chip Package Memory.
The 128Mbit Flash memory is organized as 8M x 16 bit and 8Mbit SRAM is organized as
512K x 16 bit. The memory architecture of flash memory is designed to divide its memory
arrays into 263 blocks and this provides highly flexible erase and program capability. This
device is capable of reading data from one bank while programming or erasing in the
other banks with multi-bank organization.
512K x 16 bit. The memory architecture of flash memory is designed to divide its memory
arrays into 263 blocks and this provides highly flexible erase and program capability. This
device is capable of reading data from one bank while programming or erasing in the
other banks with multi-bank organization.
The Flash memory performs a program operation in units of 16 bits (Word) and erases in
units of a block. Single or multiple blocks can be erased. The block erase operation is
completed for typically 0.7 sec.
units of a block. Single or multiple blocks can be erased. The block erase operation is
completed for typically 0.7 sec.
The 8Mbit Muxed fCMOS SRAM supports low data retention voltage for battery backup
operation with low data retention current.
operation with low data retention current.
User Interface Hardware
LCD
The RH-48 uses a 128 x 128 color display.
LCD is controlled by UI SW and control signals.
Keyboard
RH-48 keyboard design is 4-way scroll, with navigation keys, two soft keys, and 12 num-
ber keys. The PWR key is located on top.
ber keys. The PWR key is located on top.
Power Key
All signals for keyboard are coming from UPP asic except pwr key signal which is con-
nected directly to UEM. Pressing of pwr key is detected so that switch of pwr key con-
nects PWONX is of UEM to GND and creates an interrupt.
nected directly to UEM. Pressing of pwr key is detected so that switch of pwr key con-
nects PWONX is of UEM to GND and creates an interrupt.
Lights
Introduction
RH-48 has six white LEDs for keyboard lighting purposes. The LEDs for the Display are
integrated into the Display Module.
integrated into the Display Module.
Interfaces
Display lighting and keyboard lights are controlled by UEM Klight signal (8-bit register
DriverPWMR, bits 7...4). Klight output is Pulse Width Modulation (PWM) signal, which is
DriverPWMR, bits 7...4). Klight output is Pulse Width Modulation (PWM) signal, which is