Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD Datenbogen
Produktcode
ATSAM4S-WPIR-RD
SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
120
BIC logical AND NOT, or bit clear.
ORN logical OR NOT.
Sis an optional suffix. If S is specified, the condition code flags are updated on the result of the operation, see
ORN logical OR NOT.
Sis an optional suffix. If S is specified, the condition code flags are updated on the result of the operation, see
.
condis an optional condition code, see
.
Rdis the destination register.
Rnis the register holding the first operand.
Operand2is a flexible second operand. See
Rnis the register holding the first operand.
Operand2is a flexible second operand. See
for details of the
options
Operation
The AND, EOR, and ORR instructions perform bitwise AND, Exclusive OR, and OR operations on the values in Rn
Operation
The AND, EOR, and ORR instructions perform bitwise AND, Exclusive OR, and OR operations on the values in Rn
and Operand2.
The BIC instruction performs an AND operation on the bits in Rn with the complements of the corresponding bits in
The BIC instruction performs an AND operation on the bits in Rn with the complements of the corresponding bits in
the value of Operand2.
The ORN instruction performs an OR operation on the bits in Rn with the complements of the corresponding bits in
The ORN instruction performs an OR operation on the bits in Rn with the complements of the corresponding bits in
the value of Operand2.
Restrictions
Do not use SP and do not use PC.
Condition Flags
If
Restrictions
Do not use SP and do not use PC.
Condition Flags
If
S
is specified, these instructions:
Update the N and Z flags according to the result
Can update the C flag during the calculation of Operand2, see
Do not affect the V flag.