Intel E3815 FH8065301567411 Datenbogen

Produktcode
FH8065301567411
Seite von 5308
Intel
®
 Atom™ Processor E3800 Product Family
692
Datasheet
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT
_35
_32_OF_D
ISPLA
Y_PIP
E
_B_P
R
O
GRAMMABLE_PIXE
L_DA
TA
_REGISTE
R_4
BIT
_35
_32_OF_D
ISPLA
Y_PIP
E
_B_P
R
O
GRAMMABLE_PIXE
L_DA
TA
_REGISTE
R_3
BIT
_35
_32_OF_D
ISPLA
Y_PIP
E
_B_P
R
O
GRAMMABLE_PIXE
L_DA
TA
_REGISTE
R_2
BIT
_35
_32_OF_D
ISPLA
Y_PIP
E
_B_P
R
O
GRAMMABLE_PIXE
L_DA
TA
_REGISTE
R_1
RE
SE
RVED
MODE_SELE
C
T
PIXEL_GENE
RA
TO
R_E
N
ABLE
Bit 
Range
Default & 
Access
Field Name (ID): Description
31:28
0b
RW
BIT_35_32_OF_DISPLAY_PIPE_B_PROGRAMMABLE_PIXEL_DATA_REGISTER_
4: 
Project: All  
Default Value: 0b 
27:24
0b
RW
BIT_35_32_OF_DISPLAY_PIPE_B_PROGRAMMABLE_PIXEL_DATA_REGISTER_
3: 
Project: All  
Default Value: 0b  
Address: GraphicsAddress[35:32] 
23:20
0b
RW
BIT_35_32_OF_DISPLAY_PIPE_B_PROGRAMMABLE_PIXEL_DATA_REGISTER_
2: 
Project: All  
Default Value: 0b 
19:16
0b
RW
BIT_35_32_OF_DISPLAY_PIPE_B_PROGRAMMABLE_PIXEL_DATA_REGISTER_
1: 
Project: All  
Default Value: 0b 
15:2
0b
RW
RESERVED: 
Project: All Format: 
1
0b
RW
MODE_SELECT: 
Project: All  
Default Value: 0b  
Pixel generator mode select  
Value Name Description Project  
0b LFSR LFSR All  
1b Programmable Programmable pixel data register. Setting mode select to 1 will also 
start the 2-bit counter. All 
0
0b
RW
PIXEL_GENERATOR_ENABLE: 
All Format: Enable