Lantronix DSTni-EX Benutzerhandbuch

Host Mode Operation________________________________________________________ 50

Sample Host Mode Operations ________________________________________________ 51

USB Pull-up/Pull-down Resistors_______________________________________________ 53

USB Interface Signals _______________________________________________________ 54

5: CAN Controllers _____________________________________________ 55

CANBUS Background _______________________________________________________ 56

Data Exchanges and Communication _________________________________________ 56

Arbitration and Error Checking ______________________________________________ 56

CANBUS Speed and Length ________________________________________________ 57

Features __________________________________________________________________ 57

Theory of Operation _________________________________________________________ 58

CAN Register Summaries ____________________________________________________ 58

Detailed CAN Register Map_________________________________________________ 60

CAN Register Definitions _____________________________________________________ 63

TX Message Registers ____________________________________________________ 63

Tx Message Registers _____________________________________________________ 64

RX Message Registers ____________________________________________________ 66

Rx Message Registers_____________________________________________________ 67

Error Count and Status Registers ____________________________________________ 70

Interrupt Flags ___________________________________________________________ 72

Interrupt Enable Registers __________________________________________________ 73

CAN Operating Mode _____________________________________________________ 74

CAN Configuration Registers _______________________________________________ 75

Acceptance Filter and Acceptance Code Mask__________________________________ 78

CANbus Analysis _________________________________________________________ 81

CAN Bus Interface __________________________________________________________ 84

Interface Connections _____________________________________________________ 84

List of Tables

Table 2-1. SPI Controller Register Summary .............................................................................. 5

Table 2-2. SPI_DATA Register ................................................................................................... 6

Table 2-3. SPI_DATA Register Definitions.................................................................................. 6

Table 2-4. CTL Register.............................................................................................................. 7

Table 2-5. CTL Register Definitions ............................................................................................ 7

Table 2-6. SPI_STAT Register.................................................................................................... 8

Table 2-7. SPI_STAT Register Definitions .................................................................................. 8

Table 2-8. SPI_SSEL Register.................................................................................................... 9

Table 2-9. SPI_SSEL Register Definitions .................................................................................. 9

Table 2-10. BCNT Bit Settings .................................................................................................... 9

Table 2-11. DVD_CNTR_LO Register ...................................................................................... 10

Table 2-12. DVD_CNTR_LO Register Definitions..................................................................... 10

Table 2-13. DVD_CNTR_HI Register........................................................................................ 10

Table 2-14. DVD_CNTR_HI Register Definitions ...................................................................... 10

Table 3-1. Master Transmit Status Codes................................................................................. 14

Table 3-2. Codes After Servicing Interrupts (Master Transmit) ................................................. 15

Table 3-3. Status Codes After Each Data Byte Transmits ........................................................ 16

Table 3-4. Master Receive Status Codes.................................................................................. 17

Table 3-5. Codes After Servicing Interrupt (Master Receive).................................................... 18

Table 3-6. Codes After Receiving Each Data Byte.................................................................... 19

Table 3-7. I

C Controller Register Summary ............................................................................. 22

Table 3-8. Slave Address Register............................................................................................ 23

Table 3-9. Address Register Definitions.................................................................................... 23

Table 3-10. Data Register ......................................................................................................... 24

Table 3-11. Data Register Definitions ....................................................................................... 24

Table 3-12. Control Register ..................................................................................................... 25

Table 3-13. Control Register Definitions ................................................................................... 25

Table 3-14. Status Register ...................................................................................................... 26

Table 3-15. Status Register Definitions..................................................................................... 27

Table 3-16. Status Codes ......................................................................................................... 27