Hitachi H*/3694F-ZTAT User Manual
Rev. 1.0, 07/01, page 121 of 372
9.3.4
Port Pull-up Control Register 5(PUCR5)
PUCR5 controls the pull-up MOS in bit units of the pins set as the input ports.
Bit Bit Name
Initial Value
R/W
Description
7
6
−
−
−
0
0
−
−
−
Reserved
These bits are always read as 0 and cannot be modified.
5
4
3
2
1
0
P55
P54
P53
P52
P51
P50
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Only bits for which PCR5 is cleared are valid. The pull-up
MOS of the corresponding pins enter the on-state when
these bits are set to 1, while they enter the off-state when
these bits are cleared to 0.
MOS of the corresponding pins enter the on-state when
these bits are set to 1, while they enter the off-state when
these bits are cleared to 0.
9.3.5
Pin Functions
The correspondence between the register specification and the port functions is shown below.
P57/SCL pin
Register
ICCR
PCR5
Bit Name
ICE
PCR57
Pin Function
Setting Value 0
0
P57 input pin
0
1
P57 output pin
1
X
SCL I/O pin
Legend X: Don't care.
SCL performs the NMOS open-drain outputs, that enables a direct bus drive.
P56/SDA pin
Register
ICCR
PCR5
Bit Name
ICE
PCR56
Pin Function
Setting Value 0
0
P56 input pin
0
1
P56 output pin
1
X
SDA I/O pin
Legend X: Don't care.
SDA performs the NMOS open-drain outputs, that enables a direct bus drive.