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Hitachi H*/3694F-ZTAT User Manual

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Rev. 1.0, 07/01, page 46 of 372
Bit
Bit Name
Initial Value R/W
Description
2
IEG2
0
R/W
IRQ2 Edge Select
0: Falling edge of 
IRQ2
 pin input is detected
1: Rising edge of 
IRQ2
 pin input is detected
1
IEG1
0
R/W
IRQ1 Edge Select
0: Falling edge of 
IRQ1
 pin input is detected
1: Rising edge of 
IRQ1
 pin input is detected
0
IEG0
0
R/W
IRQ0 Edge Select
0: Falling edge of 
IRQ0
 pin input is detected
1: Rising edge of 
IRQ0
 pin input is detected
3.2.2
 
Interrupt Edge Select Register 2(IEGR2)
IEGR2 selects the direction of an edge that generates interrupt requests of the pins 
ADTRG and
WKP5 to WKP0.
Bit
Bit Name
Initial Value
R/W
Description
7
6
−
−
1
1
−
−
Reserved
These bits are always read as 1, and cannot be modified.
5
WPEG5
0
R/W
WKP5 Edge Select
0: Falling edge of 
WKP5
(
ADTRG
) pin input is detected
1: Rising edge of 
WKP5
(
ADTRG
) pin input is detected
4
WPEG4
0
R/W
WKP4 Edge Select
0: Falling edge of 
WKP4
 pin input is detected
1: Rising edge of 
WKP4
 pin input is detected
3
WPEG3
0
R/W
WKP3 Edge Select
0: Falling edge of 
WKP3
 pin input is detected
1: Rising edge of 
WKP3
 pin input is detected
2
WPEG2
0
R/W
WKP2 Edge Select
0: Falling edge of 
WKP2 
pin input is detected
1: Rising edge of 
WKP2
 pin input is detected
1
WPEG1
0
R/W
WKP1Edge Select
0: Falling edge of 
WKP1
 pin input is detected
1: Rising edge of 
WKP1
 pin input is detected
0
WPEG0
0
R/W
WKP0 Edge Select
0: Falling edge of 
WKP0
 pin input is detected
1: Rising edge of 
WKP0
 pin input is detected