Hitachi H8/3690 User Manual
Rev. 1.0, 07/01, Page
xix
of
xxiv
Figure 15-17 Sample Flowchart for Master Transmit Mode ......................................................246
Figure 15-18 Sample Flowchart for Master Receive Mode ........................................................247
Figure 15-19 Sample Flowchart for Slave Transmit Mode.........................................................248
Figure 15-20 Sample Flowchart for Slave Receive Mode ..........................................................249
Figure 15-21 The Timing of the Bit Synchronous Circuit ..........................................................251
Figure 15-18 Sample Flowchart for Master Receive Mode ........................................................247
Figure 15-19 Sample Flowchart for Slave Transmit Mode.........................................................248
Figure 15-20 Sample Flowchart for Slave Receive Mode ..........................................................249
Figure 15-21 The Timing of the Bit Synchronous Circuit ..........................................................251
Section 16 A/D Converter
Figure 16-1 Block Diagram of A/D Converter ...........................................................................254
Figure 16-2 A/D Conversion Timing..........................................................................................260
Figure 16-3 External Trigger Input Timing ................................................................................261
Figure 16-4 A/D Conversion Precision Definitions (1) ..............................................................262
Figure 16-5 A/D Conversion Precision Definitions (2) ..............................................................263
Figure 16-6 Analog Input Circuit Example ................................................................................264
Figure 16-1 Block Diagram of A/D Converter ...........................................................................254
Figure 16-2 A/D Conversion Timing..........................................................................................260
Figure 16-3 External Trigger Input Timing ................................................................................261
Figure 16-4 A/D Conversion Precision Definitions (1) ..............................................................262
Figure 16-5 A/D Conversion Precision Definitions (2) ..............................................................263
Figure 16-6 Analog Input Circuit Example ................................................................................264
Section 17 Power-on Reset and Low-Voltage Detection Circuits (Optional)
Figure 17-1 Block Diagram of the Power-on Reset Circuit
Figure 17-1 Block Diagram of the Power-on Reset Circuit
and Low-Voltage Detection Circuit ........................................................................266
Figure 17-2 Operational Timing of the Power-on Reset Circuit.................................................269
Figure 17-3 Operational Timing of LVDR .................................................................................270
Figure 17-4 Operational Timing of LVDI .................................................................................271
Figure 17-5 Timing for Operation/Release of the Low-Voltage Detection Circuit ....................272
Figure 17-3 Operational Timing of LVDR .................................................................................270
Figure 17-4 Operational Timing of LVDI .................................................................................271
Figure 17-5 Timing for Operation/Release of the Low-Voltage Detection Circuit ....................272
Section 18 Power Supply Circuit
Figure 18-1 Power Supply Connection when Internal Step-Down Circuit is Used ....................273
Figure 18-2 Power Supply Connection when Internal Step-Down Circuit is not Used ..............274
Figure 18-1 Power Supply Connection when Internal Step-Down Circuit is Used ....................273
Figure 18-2 Power Supply Connection when Internal Step-Down Circuit is not Used ..............274
Section 20 Electrical Characteristics
Figure 20-1 System Clock Input Timing ....................................................................................315
Figure 20-2
Figure 20-1 System Clock Input Timing ....................................................................................315
Figure 20-2
RES Low Width Timing .........................................................................................315
Figure 20-3 Input Timing............................................................................................................316
Figure 20-4 I
Figure 20-4 I
2
C Bus Interface Input/Output Timing ...................................................................316
Figure 20-5 SCK3 Input Clock Timing ......................................................................................316
Figure 20-6 SCI Synchronous Mode Input/Output Timing ........................................................317
Figure 20-7 Output Load Condition............................................................................................317
Figure 20-6 SCI Synchronous Mode Input/Output Timing ........................................................317
Figure 20-7 Output Load Condition............................................................................................317
Appendix
Figure B.1 Port 1 Block Diagram (P17) .....................................................................................349
Figure B.2 Port 1 Block Diagram (P16 to P14) ..........................................................................350
Figure B.3 Port 1 Block Diagram (P12, P11) .............................................................................351
Figure B.4 Port 1 Block Diagram (P10) .....................................................................................352
Figure B.5 Port 2 Block Diagram (P22) .....................................................................................353
Figure B.6 Port 2 Block Diagram (P21) .....................................................................................354
Figure B.7 Port 2 Block Diagram (P20) .....................................................................................355
Figure B.8 Port 5 Block Diagram (P57, P56) .............................................................................356
Figure B.9 Port 5 Block Diagram (P55) .....................................................................................357
Figure B.10 Port 5 Block Diagram (P54 to P50) ........................................................................358
Figure B.1 Port 1 Block Diagram (P17) .....................................................................................349
Figure B.2 Port 1 Block Diagram (P16 to P14) ..........................................................................350
Figure B.3 Port 1 Block Diagram (P12, P11) .............................................................................351
Figure B.4 Port 1 Block Diagram (P10) .....................................................................................352
Figure B.5 Port 2 Block Diagram (P22) .....................................................................................353
Figure B.6 Port 2 Block Diagram (P21) .....................................................................................354
Figure B.7 Port 2 Block Diagram (P20) .....................................................................................355
Figure B.8 Port 5 Block Diagram (P57, P56) .............................................................................356
Figure B.9 Port 5 Block Diagram (P55) .....................................................................................357
Figure B.10 Port 5 Block Diagram (P54 to P50) ........................................................................358