Advantech PCI-1718 Series User Manual
PCI-1718 Series User Manual
74
C.14 Timer/Counter Enable — BASE+0AH
Write register BASE+0AH enables or disables the PCI-1718 card’s timer/
counter.
counter.
TC0 Disable/enable pacer
0 Pacer
0 Pacer
enabled
1 Pacer controlled by TRIG0. This blocks trigger pulses sent from the
pacer to the A/D until TRIG0 is taken high.
pacer to the A/D until TRIG0 is taken high.
TC1 Counter 0 input source mode
0 Sets Counter 0 to accept external clock pulses
1 Connects Counter 0 internally to a 100 KHz clock source
0 Sets Counter 0 to accept external clock pulses
1 Connects Counter 0 internally to a 100 KHz clock source
C.15 Programmable Timer/Counter — BASE+0C~0FH
The four registers located at addresses BASE+0CH, BASE+0DH,
BASE+0EH and BASE+0FH are used for the Intel 8254 programmable
timer/counter. Please refer to the 8254 product literature for detailed
application information.
BASE+0EH and BASE+0FH are used for the Intel 8254 programmable
timer/counter. Please refer to the 8254 product literature for detailed
application information.
Table C.16: Register for Timer/Counter Enable
Write
Timer/Counter enable
Bit #
7
6
5
4
3
2
1
0
BASE + 0AH
TC1
TC0