Lucent Technologies Release 7 User Manual
DEFINITY Enterprise Communications Server Release 7
Maintenance for R7r
Maintenance for R7r
555-230-126
Issue 4
June 1999
Maintenance Object Repair Procedures
9-1583
SYNC (Synchronization)
9
Error Log Entries and Test to Clear Values
Notes:
a. This error indicates a problem with the primary DS1 reference. It will be
cleared when the primary reference is restored. The following steps
should give an indication of the source of the problem:
should give an indication of the source of the problem:
1. Check if the primary DS1 interface circuit pack is inserted in the
carrier via the list configuration board UUCSS command.
2. Verify that the administered primary reference matches the DS1
reference from the network synchronization plan.
3. Test the primary DS1 interface circuit pack via the test board
UUCSS long command. Check the Error Log for DS1-BD or
UDS1-BD errors and refer to the DS1-BD or UDS1-BD (DS1
Interface Circuit Pack or UDS1 Interface Circuit Pack) Maintenance
documentation to resolve any errors associated with the primary
DS1 (DS1 or UDS1) interface circuit pack. If the only errors against
DS1-BD or UDS1-BD are slip errors, then follow the procedures
described in the troubleshooting section above. If no errors are
listed in the Error Log for the primary DS1 interface circuit pack,
continue with the following steps.
UDS1-BD errors and refer to the DS1-BD or UDS1-BD (DS1
Interface Circuit Pack or UDS1 Interface Circuit Pack) Maintenance
documentation to resolve any errors associated with the primary
DS1 (DS1 or UDS1) interface circuit pack. If the only errors against
DS1-BD or UDS1-BD are slip errors, then follow the procedures
described in the troubleshooting section above. If no errors are
listed in the Error Log for the primary DS1 interface circuit pack,
continue with the following steps.
4. Test the active Tone-Clock circuit pack in the master port network
via the test tone-clock UUC long command. Check the Error Log
for TDM-CLK errors and verify that TDM Bus Clock Test #148 (TDM
Bus Clock Circuit Status Inquiry test) passes successfully. If Test
for TDM-CLK errors and verify that TDM Bus Clock Test #148 (TDM
Bus Clock Circuit Status Inquiry test) passes successfully. If Test
Table 9-597.
Synchronization Maintenance Error Log Entries
Error
Type
Aux
Data
Associated
Test
Alarm Level
On/Off
Board
Test to Clear Value
0
1
1.
Run the Short Test Sequence first. If all tests pass, run the Long Test Sequence. Refer to the
appropriate test description and follow the recommended procedures.
appropriate test description and follow the recommended procedures.
0
Any
Any
Any
test synchronization
1(a)*
None
WARNING/MINOR(h)
OFF
None
18(b)
0
disable sync
WARNING
OFF
enable sync
257(c)*
None
WARNING/MINOR(h)
OFF
None
513(d)*
None
WARNING/MAJOR(h)
OFF
None
769(e)
None
MAJOR
OFF
None
1793(f)
2
2.
It may take up to 1 hour for these alarms to clear via the ‘‘leaky bucket’’ strategy.
0-50
None
MAJOR
OFF
None
2049(g)
2
0
None
WARNING
OFF
None