Intel Xeon L7455 AD80582JH046003 Data Sheet
Product codes
AD80582JH046003
Intel® Xeon® Processor 7400 Series Datasheet
49
Electrical Specifications
Notes:
1.
Ta = T40 (FERR# Valid Delay from STPCLK# Deassertion).
2.
FERR# / PBE# is undefined from STPCLK# assertion until the Stop-Grant acknowledge is driven on the
FSB. FERR# / PBE# is also undefined for a period of Ta from STPCLK# deassertion. Inside these undefined
regions, the PBE# signal is driven. FERR# is driven at all other times.
§
Figure 2-22. VID Step Timings
Figure 2-23. VID Step Times and Vcc Waveforms
VID
n
n-1
m+1
m
...
Ta
Tb
Tc
Td
Ta = T84: VID Down to Valid V
CC
(max)
Tb = T82: VID Down to Valid V
CC
(min)
Tc = T85: VID Up to Valid V
CC
(max)
Td = T83: VID Up to Valid V
CC
(min)
V
CC
(max)
V
CC
(min)
VID
V
CC
(max)
V
CC
(min)
n
n-
1
n-
2
n-
3
n-
4
n-6 = VID
TM2
n-
1
n-
2
n-
3
n-
4
n
Ta
Tb
Td
Tc
Te
Tf
V
CC
(max,n-3)
V
CC
(min,n-3)
V
CC
(max,n-4)
V
CC
(min,n-4)
Ta = T80: VID Step Time
Tb = T81: Thermal Monitor 2 Dwell Time
Tc = T84: VID Down to Valid V
Tb = T81: Thermal Monitor 2 Dwell Time
Tc = T84: VID Down to Valid V
CC
(max)
Td = T82: VID Down to Valid V
CC
(min)
Te = T85: VID Up to Valid V
CC
(max)
Tf
= T83: VID Up to Valid V
CC
(min)
n-
5
n-
5
Note: This waveform illustrates an example of an Intel Thermal
Monitor 2 transition or an Intel Enhanced SpeedStep
Technology transition that is six VID steps down from the
current state and six steps back up. Any arbitrary up or down
transition can be generalized from this waveform.
Monitor 2 transition or an Intel Enhanced SpeedStep
Technology transition that is six VID steps down from the
current state and six steps back up. Any arbitrary up or down
transition can be generalized from this waveform.