Albatron Technology ARM11/Cortex-A8 User Manual

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bdi
GDB
 for GNU Debugger, BDI2000 (ARM11/Cortex-A8)
User Manual
 38
© Copyright 1997-2007 by ABATRON AG Switzerland 
V 1.04
3.2.5 Part [REGS]
In order to make it easier to access target registers via the Telnet interface, the BDI can read in a
register definition file. In this file, the user defines a name for the register and how the BDI should
access it (e.g. as memory mapped, memory mapped with offset, ...). The name of the register defi-
nition file and information for different registers type has to be defined in the configuration file.
The register name, type, address/offset/number and size are defined in a separate register definition
file. This way, you can create one register definition file for a specific target processor that can be
used for all possible positions of the internal memory map. You only have to change one entry in the
configuration file.
An entry in the register definition file has the following syntax:
name
type
addr
size
name
The name of the register (max. 12 characters)
type
The register type
GPR
General purpose register
CP15
Coprocessor 15 register
CP14
Coprocessor 14register
....
CP0
Coprocessor 0 register
MM
Absolute direct memory mapped register
DMM1...DMM4
Relative direct memory mapped register
IMM1...IMM4
Indirect memory mapped register
APB
APB memory mapped register
addr
The address, offset or number of the register
size
The size (8, 16, 32) of the register, default is 32
The following entries are supported in the [REGS] part of the configuration file:
FILE filename
The name of the register definition file. This name is used to access the
file via TFTP. The file is loaded once during BDI startup.
filename
the filename including the full path
Example:
FILE   C:\bdi\regs\reg40400.def
DMMn base
This defines the base address of direct memory mapped registers. This
base address is added to the individual offset of the register.
base
the base address 
Example:
DMM1 0x01000
IMMn addr data
This defines the addresses of the memory mapped address and data reg-
isters of indirect memory mapped registers. The address of a IMMn regis-
ter is first written to "addr" and then the register value is access using
"data" as address.
addr
the address of the Address register
data
the address of the Data register
Example:
IMM1 0x04700000 0x04700004