Mentor v8.6_4 User Manual
Command Dictionary
Add Cell Constraints
FastScan and FlexTest Reference Manual, V8.6_4
2-43
Add Cell Constraints
Tools Supported: FastScan and FlexTest
Scope: Setup mode
Usage
ADD CEll Constraints {pin_pathname | {chain_name cell_position}} C0 | C1 |
CX | Ox | Xx
Description
Constrains scan cells to be at a constant value.
The Add Cell Constraints command constrains scan cells slightly differently for
FastScan and FlexTest. For FastScan, the command constrains scan cells to be at a
constant value during the ATPG process. For FlexTest, the command constrains
scan cells so that the tool loads them with a constant value during scan loading,
however, scan cells may change value after scan loading.
FastScan and FlexTest. For FastScan, the command constrains scan cells to be at a
constant value during the ATPG process. For FlexTest, the command constrains
scan cells so that the tool loads them with a constant value during scan loading,
however, scan cells may change value after scan loading.
For both tools, you identify a scan cell by either specifying an output pin
pathname that connects to a scan memory element or by specifying a scan chain
name along with the cell’s position in the scan chain. The tool places the
constraint value that you specify at either the output pin or the scan cell MASTER.
pathname that connects to a scan memory element or by specifying a scan chain
name along with the cell’s position in the scan chain. The tool places the
constraint value that you specify at either the output pin or the scan cell MASTER.
The rules checker audits the correctness of the data that defines the constrained
scan cells immediately after scan cell identification. The checker identifies all
invalid scan cell constraints and an error condition occurs.
scan cells immediately after scan cell identification. The checker identifies all
invalid scan cell constraints and an error condition occurs.
In the case of scan cells with improper controllability or observability, rather than
rejecting these circuits you can constrain (or mask) their controllability or
observability.
rejecting these circuits you can constrain (or mask) their controllability or
observability.
Arguments
•
pin_pathname
A string that specifies the name of an output pin of the scan cell or an output
pin directly connected through only buffers and inverters to the output of a
scan memory element. The scan memory element is set to the value that you
specify such that the pin is at the constrained value.
pin directly connected through only buffers and inverters to the output of a
scan memory element. The scan memory element is set to the value that you
specify such that the pin is at the constrained value.