Intel 31244 PCI-X User Manual

44

 provides an example stackup that may be used to implement the backplane design. The 

stripline shown in 

 is implemented with ground flood on both component and solder side 

of the PCB. The differential stripline traces are etched from the power and ground planes. Note that 
this information is preliminary.

Single Ended Trace Impedance

60 +/- 14% ohms

Differential impedance

100 +/- 15%

Reference Plane

ground

Trace Thickness

1.4 mil

Trace Width

11.5 mil

Intra Pair Trace Spacing

29.7 mil

intra-pair center-to-center (broadside coupled)

Pair to Pair

Trace Spacing

60 mil

pair-to-pair, center-to-center for two adjacent 

differential pairs

Trace Length

2” to 14”

Trace Length Matching

10 mils

intra-pair matching

R1

15 +/- 5% ohms

Required only for the write topology shown in 

R2

150 +/- 5% ohms

Required only for the write topology shown in 

B0425-01

1.4 mil

1.4 mil

49.5 mil

11.5 mil

1.4 mil