Fujitsu MB15C02 User Manual
3
MB15C02
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PIN DESCRIPTIONS
(Continued)
Pin no.
Pin
name
I/O
Descriptions
SSOP
16
SSOP
20
1
1
V
DD
–
Power supply voltage
2
2
Clock
I
Clock input for the shift register.(Schmitt trigger input)
Data is shifted into the shift register on the rising edge of the clock.
Data is shifted into the shift register on the rising edge of the clock.
–
3
NC
–
No connection
3
4
Data
I
Serial data input using binary code.(Schmitt trigger input)
4
5
LE
I
Load enable signal input (Schmitt trigger input)
When LE is high, the data in the shift register is transferred to a latch,
according to the control bit in the serial data.
When LE is high, the data in the shift register is transferred to a latch,
according to the control bit in the serial data.
5
6
fin
I
Prescaler input.
A bias circuit and amplifier are at input port. Connection with an external
VCO should be done by AC coupling.
A bias circuit and amplifier are at input port. Connection with an external
VCO should be done by AC coupling.
6
7
PS
I
Power saving mode control. This pin must be set at “L” at Power-ON.
PS = “H” ; Normal mode
PS = “L” ; Power saving mode
PS = “H” ; Normal mode
PS = “L” ; Power saving mode
–
8
NC
–
No connection
7
9
LD
O
Lock detector signal output.
When a PLL is locking, LD outputs “H”.
When a PLL is not locking, LD outputs “L”.
When a PLL is locking, LD outputs “H”.
When a PLL is not locking, LD outputs “L”.
8
10
Do
O
Charge pump output.
Phase of the charge pump can be reversed by FC input. The Do output
may be inverted by FC input. The relationships between the programmable
reference divider output (fr) and the programmable divider output (fp) are
shown below;
fr > fp :“H” level (FC = “L”), “L” level (FC = “H”)
fr = fp : High impedance
fr < fp :“L” level (FC = “L”), “H” level (FC = “H”)
Phase of the charge pump can be reversed by FC input. The Do output
may be inverted by FC input. The relationships between the programmable
reference divider output (fr) and the programmable divider output (fp) are
shown below;
fr > fp :“H” level (FC = “L”), “L” level (FC = “H”)
fr = fp : High impedance
fr < fp :“L” level (FC = “L”), “H” level (FC = “H”)
9
11
Vp
–
Power supply for the charge pump.
10
12
φ
R
O
Phase comparator output pin (for external charge pump). Relation between
the programmable reference divider output (fr) and the programmable divider
output (fp) are shown below;
When FC = “L”
fr > fp :
the programmable reference divider output (fr) and the programmable divider
output (fp) are shown below;
When FC = “L”
fr > fp :
φ
R = “L” level,
φ
P = “L” level
fr = fp :
φ
R = “L” level,
φ
P = High impedance
fr < fp :
φ
R = “H” level,
φ
P = High impedance
When FC = “H”
fr > fp :
fr > fp :
φ
R = “H” level,
φ
P = High impedance
fr = fp :
φ
R = “L” level,
φ
P = High impedance
fr < fp :
φ
R = “L” level,
φ
P = “L” level
–
13
NC
–
No connection
11
14
φ
P
O
Phase comparator output pin (for external charge pump). Refer to Pin
description for
description for
φ
R.
φ
P pin is a Nch open drain output.
12
15
FC
I
Phase comparator input select pin.
13
16
TEST
I
Test mode select pin. (Pull down resistor)
Please set this pin to ground or open usually.
Please set this pin to ground or open usually.