Contec SPI-8451-LLVA User Manual
8. BIOS Setup
SPI-8451-LLVA, SPI-8452-LLVA, SPI-8451-LVA
87
Description
Choice
Video BIOS Cacheable
Selecting Enabled allows caching of the video BIOS
ROM at C0000h to CBFFFh, resulting in better
video performance. However, if any program writes
to this memory area, a system error may result.
ROM at C0000h to CBFFFh, resulting in better
video performance. However, if any program writes
to this memory area, a system error may result.
Memory Hole At 15M-16M
You can reserve this area of system memory for ISA
adapter ROM. When this area is reserved, it
cannot be cached. The user information of
peripherals that need to use this area of system
memory usually discusses their memory
requirements.
adapter ROM. When this area is reserved, it
cannot be cached. The user information of
peripherals that need to use this area of system
memory usually discusses their memory
requirements.
Delay Transaction
The chipset has an embedded 32-bit posted write
buffer to support delay transactions cycles. Select
Enabled to support compliance with PCI
specification version 2.1.
buffer to support delay transactions cycles. Select
Enabled to support compliance with PCI
specification version 2.1.
Delay Prior to Thermal
Select the interval to setup the delay timer for CPU
Thermal-Throttling.
Thermal-Throttling.
AGP Aperture Size (MB)
Select the size of the Accelerated Graphics Port
(AGP) aperture. The aperture is a portion of the
PCI memory address range dedicated for graphics
memory address space. Host cycles that hit the
aperture range are forwarded. Host cycles that hit
the aperture range are forwarded to the AGP
without any translation.
(AGP) aperture. The aperture is a portion of the
PCI memory address range dedicated for graphics
memory address space. Host cycles that hit the
aperture range are forwarded. Host cycles that hit
the aperture range are forwarded to the AGP
without any translation.
On-Chip VGA setting