SBE HW400c/2 User Manual
HighWire HW400c/2 User Reference Guide Rev 1.0
Figure 7. Optional Reset/NMI switch
3.1.4 COP/JTAG Port
s. The J6 header can also
e used to access the JTAG chain for the entire board.
The COP/JTAG port uses 3.3V signaling.
A 16-pin header (J6, see Figure 2, and Figure 8) and a 6-pin header (JX6) are
provided on the HW400c/2 board for connecting to the processor’s COP (Common
On-chip Processor) port for factory development purpose
b
provided on the HW400c/2 board for connecting to the processor’s COP (Common
On-chip Processor) port for factory development purpose
b
Figure 8. COP/JTAG Pinout
rpose Jumper Block
3.1.5 Special Pu
Jumper block J7, located along the top of the board, is used for diagnostic and other
special purposes. Under normal operating circumstances these jumpers will remain
uninstalled. The IGNP jumper is necessary when in standalone test mode (no PCI
bus is present, or no PCI Slot One Master installed). See Figure 9 and Table 8, below.
special purposes. Under normal operating circumstances these jumpers will remain
uninstalled. The IGNP jumper is necessary when in standalone test mode (no PCI
bus is present, or no PCI Slot One Master installed). See Figure 9 and Table 8, below.
Figure 9. J7 Special purpose jumper block
Pin 1
October 10, 2006
Copyright 2006, SBE, Inc.
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