SBE HW400c/2 User Manual

HighWire HW400c/2 User Reference Guide Rev 1.0

RBC to a size that exceeds the actual register size will result in an incorrect read

valu

er size values

re in strict accordance with the BCM5388 data sheet.

4.4.3 Reading BCM

. Check the SBSY flag in the SPI Error and Status Register, bit 0 (SESR, see

Section 4.2.24). If set to “0”, proceed to the next step.

B. Set the SPI Page Register (SPR, see Section 4.2.18) to the desired register page

of the Ethernet switch.

C. Set the SPI Address Register (SAR, see Section 4.2.19) to the desired register

base byte address within the selected page.

D. Set the SPI Read Byte Address Offset Register (SOR, see Section 4.2.20) to the

first byte to be read of the Ethernet switch register:
‘0’ for the first byte, bits 0-7 (LSB) of the register
‘1’ for the 2

byte, bits 8-15, and so on.

E. Set the Read Byte Count Register (RBC, see Section 4.2.21) to the count of bytes

to read. This step initiates reading from the switch to the CPLD.

An incorrect read value will result if this count exceeds the size of the Ethernet
switch register. There are no error flags to indicate this type of error.

F. Poll the SBSY flag until it equals “0”.

G. Check the SESR for any error flags. If no errors, proceed to the next step.

H. Read each byte out of the SPI Data Registers (SDR0-7, see Section 4.2.23). The

first byte is LSB.

4.4.4 Writing a BCM5388 Register

A. Check the SBSY flag in the SPI Error and Status Register, bit 0 (SESR, see

Section 4.2.24). If set to “0”, proceed to the next step.

B. Set the SPI Page Register (SPR, see Section 4.2.18) to the desired register page

of the Ethernet switch.

C. Set the SPI Address Register (SAR, see Section 4.2.20) to the desired register

base byte address within the selected page. (There is no byte offset for writing.)

No error flags will be set to indicate these types of errors.

When reading or writing the BCM5388 registers, ensure that the regist

5388 Register

October 10, 2006

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