Freescale Semiconductor MC68HC08KH12 User Manual

Advance Information

MC68HC(7)08KH12

 — 

Rev. 1.1

198

Freescale Semiconductor

Port E pins PTE3–PTE0, each has an optical coupling interface circuit 
which is specially built for optical mouse application. Bits [1:0] of the 
Optical Interface Enable register enable or disable the interface circuit in 
each port E pins PTE3–PTE0, whilst bits [7:2] define the reference level 
for the optical interface circuit for optimum performance.

OIEX — Optical Interface Enable X.

This enables optical interface on PTE0 and PTE1 pins. It also enables 
the voltage divider circuit.

1 = PTE0 and PTE1 optical interface enabled.
0 = PTE0 and PTE1 optical interface disabled.

OIEY — Optical Interface Enable Y.

This enables optical interface on PTE2 and PTE3 pins. It also enables 
the voltage divider circuit.

1 = PTE2 and PTE3 optical interface enabled.
0 = PTE2 and PTE3 optical interface disabled.

0

X

(1)

Input, Hi-Z

(2)

DDRE[4:0]

Pin

PTE[4:0]

(3)

1

X

Output

DDRE[4:0]

PTE[4:0]

PTE[4:0]

1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.

Address:

$001C

Bit  7

6

5

4

3

2

1

Bit  0

Read:

YREF2

YREF1

YREF0

XREF2

XREF1

XREF0

OIEY

OIEX

Write:

Reset:

0

1

0

0

1

0

0

0