ARM r1p3 User Manual

Page of 456
Revisions 
ARM DDI 0363E
Copyright © 2009 ARM Limited. All rights reserved.
C-2
ID013010
Non-Confidential, Unrestricted Access
Updated reset value information for:
Cache Type Register
MPU Type Register
Instruction Set Attributes Register 1
Instruction Set Attributes Register 4
Current Cache Size Identification Register
Current Cache Level ID Register 
MPU Region Base Address Registers
MPU Region Size and Enable Register
MPU Region Access Control Register
MPU Memory Region Number
ATCM Region Register
BTCM Region Register
TCM  selection Register
Performance Monitor Control Register
Software Increment Register
User read/write Thread and Process ID Register
User read-only Thread and Process ID Register
Privileged-only Thread and Process ID Register
Secondary Auxiliary Control Register
Build Options 1 Register 
Build Options 2 Register 
Correctable Fault Location Register
Updated Type information for the Coprocessor Access Register
Clarified the description of the Instruction Set Attributes Register 3
Clarified functions for bits [31], [30], [29], and 28]
Clarified functions for bits [20], [19], [18], [17], [16], [3], and [2]
Clarified instructions that the PFU recognizes as procedure calls and 
procedure returns
Added reference to Application Note 204
Added section
Clarified the description of region attributes
Clarified the description of store buffer draining
Clarified the encodings for some signals
Clarified the number of Identifiers used for AXI bus accesses
Clarified the description of the handling of TCM external faults
Added dormant mode description
Table C-1 Differences between issue B and issue C (continued)
Change
Location