SMSC LAN1198 User Manual
LAN9118 Family Programmer Reference Guide
Revision 1.0 (12-14-09)
26
SMSC AN 12.12
APPLICATION NOTE
Steps Three - Seven:
3. Read the MAC_CSR_CMD Register until the CSR Busy Bit = 0.
4. Write the MAC_CSR_CMD as follows: Busy Bit = 1, R/nW = 1, CSR Address = 0x06.
5. Read the MAC_CSR_CMD Register until the CSR Busy Bit = 0
6. Read the MAC_CSR_Data Register. Repeat Steps 3-6 until the MII Busy Bit = 0 The contents of
the PHY Status Register (Register 4) have now been loaded into the MII_Data Register.
the PHY Status Register (Register 4) have now been loaded into the MII_Data Register.
Step Seven
Write the command word into the MAC_CSR_CMD register. This command causes the
MAC_CSR_Data register to be loaded (R/nW == 1) with the contents of the MII Data register (0x07).
MAC_CSR_Data register to be loaded (R/nW == 1) with the contents of the MII Data register (0x07).
Steps Eight-Nine:
8. Read the MAC_CSR_CMD Register until the CSR Busy Bit = 0
9. Read the MAC_CSR_Data register, which now contains the contents of the MII Data register in the
lower 16-bits.
lower 16-bits.
MAC_CSR_CMD (ACCESSING MII_ACC REGISTER)
CSR Busy
R/nW
Reserved (29:8)
CSR Address (7:0)
1
0
0x06
MAC_CSR_CMD
CSR Busy
R/nW
Reserved (29:8)
CSR Address (7:0)
1
1
0x07
MAC_CSR_DATA
Reserved
(31:16)
PHY Data
(15:11)