Nxp Semiconductors UM10310 User Manual
UM10310_1
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 01 — 1 December 2008
117 of 139
NXP Semiconductors
UM10310
P89LPC9321 User manual
{
FMDATA = dbytes[i];
}
FMCON = EP; //erase & prog page command
Fm_stat = FMCON; //read the result status
if ((Fm_stat & 0x0F)!=0) prog_fail=1; else prog_fail=0;
return(prog_fail);
}
18.5 In-circuit programming (ICP)
In-Circuit Programming is a method intended to allow commercial programmers to
program and erase these devices without removing the microcontroller from the system.
The In-Circuit Programming facility consists of a series of internal hardware resources to
facilitate remote programming of the P89LPC9321 through a two-wire serial interface.
NXP has made in-circuit programming in an embedded application possible with a
minimum of additional expense in components and circuit board area. The ICP function
uses five pins (V
program and erase these devices without removing the microcontroller from the system.
The In-Circuit Programming facility consists of a series of internal hardware resources to
facilitate remote programming of the P89LPC9321 through a two-wire serial interface.
NXP has made in-circuit programming in an embedded application possible with a
minimum of additional expense in components and circuit board area. The ICP function
uses five pins (V
DD
, V
SS
, P0.5, P0.4, and RST). Only a small connector needs to be
available to interface your application to an external programmer in order to use this
feature.
feature.
18.6 ISP and IAP capabilities of the P89LPC9321
An In-Application Programming (IAP) interface is provided to allow the end user’s
application to erase and reprogram the user code memory. In addition, erasing and
reprogramming of user-programmable bytes including UCFG1, UCFG2, the Boot Status
Bit, and the Boot Vector is supported. As shipped from the factory, the upper 512 bytes of
user code space contains a serial In-System Programming (ISP) loader allowing for the
device to be programmed in circuit through the serial port. This ISP boot loader will, in
turn, call low-level routines through the same common entry point that can be used by the
end-user application.
application to erase and reprogram the user code memory. In addition, erasing and
reprogramming of user-programmable bytes including UCFG1, UCFG2, the Boot Status
Bit, and the Boot Vector is supported. As shipped from the factory, the upper 512 bytes of
user code space contains a serial In-System Programming (ISP) loader allowing for the
device to be programmed in circuit through the serial port. This ISP boot loader will, in
turn, call low-level routines through the same common entry point that can be used by the
end-user application.
18.7 Boot ROM
When the microcontroller contains a a 256 byte Boot ROM that is separate from the user’s
Flash program memory. This Boot ROM contains routines which handle all of the low level
details needed to erase and program the user Flash memory. A user program simply calls
a common entry point in the Boot ROM with appropriate parameters to accomplish the
desired operation. Boot ROM operations include operations such as erase sector, erase
page, program page, CRC, program security bit, etc. The Boot ROM occupies the
program memory space at the top of the address space from FF00 to FFFFh, thereby not
conflicting with the user program memory space. This function is in addition to the IAP-Lite
feature.
Flash program memory. This Boot ROM contains routines which handle all of the low level
details needed to erase and program the user Flash memory. A user program simply calls
a common entry point in the Boot ROM with appropriate parameters to accomplish the
desired operation. Boot ROM operations include operations such as erase sector, erase
page, program page, CRC, program security bit, etc. The Boot ROM occupies the
program memory space at the top of the address space from FF00 to FFFFh, thereby not
conflicting with the user program memory space. This function is in addition to the IAP-Lite
feature.
18.8 Power on reset code execution
The P89LPC9321 contains two special Flash elements: the BOOT VECTOR and the Boot
Status Bit. Following reset, the P89LPC9321 examines the contents of the Boot Status Bit.
If the Boot Status Bit is set to zero, power-up execution starts at location 0000H, which is
the normal start address of the user’s application code. When the Boot Status Bit is set to
one, the contents of the Boot Vector is used as the high byte of the execution address and
the low byte is set to 00H.
Status Bit. Following reset, the P89LPC9321 examines the contents of the Boot Status Bit.
If the Boot Status Bit is set to zero, power-up execution starts at location 0000H, which is
the normal start address of the user’s application code. When the Boot Status Bit is set to
one, the contents of the Boot Vector is used as the high byte of the execution address and
the low byte is set to 00H.