Nxp Semiconductors UM10310 User Manual
UM10310_1
© NXP B.V. 2008. All rights reserved.
User manual
Rev. 01 — 1 December 2008
97 of 139
NXP Semiconductors
UM10310
P89LPC9321 User manual
13.5 Comparators and power reduction modes
Either or both comparators may remain enabled when Power-down mode or Idle mode is
activated, but both comparators are disabled automatically in Total Power-down mode.
activated, but both comparators are disabled automatically in Total Power-down mode.
If a comparator interrupt is enabled (except in Total Power-down mode), a change of the
comparator output state will generate an interrupt and wake-up the processor. If the
comparator output to a pin is enabled, the pin should be configured in the push-pull mode
in order to obtain fast switching times while in Power-down mode. The reason is that with
the oscillator stopped, the temporary strong pull-up that normally occurs during switching
on a quasi-bidirectional port pin does not take place.
comparator output state will generate an interrupt and wake-up the processor. If the
comparator output to a pin is enabled, the pin should be configured in the push-pull mode
in order to obtain fast switching times while in Power-down mode. The reason is that with
the oscillator stopped, the temporary strong pull-up that normally occurs during switching
on a quasi-bidirectional port pin does not take place.
Comparators consume power in Power-down mode and Idle mode, as well as in the
normal operating mode. This should be taken into consideration when system power
consumption is an issue. To minimize power consumption, the user can power-down the
comparators by disabling the comparators and setting PCONA.5 to logic 1, or simply
putting the device in Total Power-down mode.
normal operating mode. This should be taken into consideration when system power
consumption is an issue. To minimize power consumption, the user can power-down the
comparators by disabling the comparators and setting PCONA.5 to logic 1, or simply
putting the device in Total Power-down mode.
13.6 Comparators configuration example
The code shown below is an example of initializing one comparator. Comparator 1 is
configured to use the CIN1A and CMPREF inputs, outputs the comparator result to the
CMP1 pin, and generates an interrupt when the comparator output changes.
configured to use the CIN1A and CMPREF inputs, outputs the comparator result to the
CMP1 pin, and generates an interrupt when the comparator output changes.
CMPINIT:
MOV PT0AD,#030h
;Disable digital INPUTS on CIN1A, CMPREF.
ANL P0M2,#0CFh
;Disable digital OUTPUTS on pins that are used
ORL P0M1,#030h
;for analog functions: CIN1A, CMPREF.
MOV CMP1,#024h
;Turn on comparator 1 and set up for:
a. CPn, CNn, OEn = 0 0 0
b. CPn, CNn, OEn = 0 0 1
c. CPn, CNn, OEn = 0 1 0
d. CPn, CNn, OEn = 0 1 1
e. CPn, CNn, OEn = 1 0 0
f. CPn, CNn, OEn = 1 0 1
g. CPn, CNn, OEn = 1 1 0
h. CPn, CNn, OEn = 1 1 1
Fig 47. Comparator configurations. (Suppose PGA1 is disabled, or gain = 1)
CINnA
CMPREF
002aaa618
COn
CINnA
CMPREF
002aaa620
COn
CMPn
CINnA
V
REF
(1.23 V)
002aaa621
COn
CINnA
V
REF
(1.23 V)
002aaa622
COn
CMPn
CINnB
CMPREF
002aaa623
COn
CINnB
CMPREF
002aaa624
COn
CMPn
CINnB
V
REF
(1.23 V)
002aaa625
COn
CINnB
V
REF
(1.23 V)
002aaa626
COn
CMPn