Jameco Electronics 3000 User Manual
User’s Manual
5
Figure 1-1. Rabbit 3000 Block Diagram
CPU
External Interface
Data
Buffer
Memory
Management/
Control
Address
Buffer
Memory Chip
Interface
Parallel Ports
Port A
Port B
Port C
Port D
Port E
Port F
Port G
Global Power
Save & Clock
Distribution
Fast
Oscillator
Timer A
Timer B
Real-Time
Clock
32.768 kHz
Clock Input
Watchdog
Timer
Periodic
Interrupt
External I/O
Chip Interface
External
Interrupts
/RESET
/IOWR
/IORD
/BUFEN
SMODE0
SMODE1
ST
A
TUS
/WDT
OUT
CLK
DA
TA
BUS
(8 bit
s)
D[7:0]
A[19:0]
XTALA1
XTALA2
XTALA2
CLK32K
I[7:0]
INT0A, INT1A
INT0B, INT1B
/CS2, /CS1, /CS0
/OE1, /OE0
/WE1, /WE0
PA [7:0]
PB[7:0]
PC[7:0]
PD[7:0]
PE[7:0]
TXA, RXA, CLKA,
ATXA, ARXA
TXB, RXB, CLKB,
ATXB, ARXB
TXC, RXC, CLKC
TXD, RXD, CLKD
ADDRESS BUS
(8 bit
s)
RESOUT
PF[7:0]
PG[7:0]
Asynch
Serial
Synch
Serial
Asynch
Bootstrap
Synch
Bootstrap
Serial Port A
Asynch Serial IrDA
Serial Ports
B,C,D
Asynch Serial IrDA
Asynch
Serial
Synch
Serial
Serial Ports
E, F
Asynch Serial IrDA
Asynch
Serial
HDLC
SDLC
HDLC/SDLC IrDA
TXE, RXE
TCLKE, RCLKE
Slave Port
Slave Interface
SD[7:0]
SA[1:0],
/SCS, /SRD, /SWR,
/SLAVEATTN
Bootstrap Interface
TXF, RXF
TCLKF, RCLKF
ID[7:0]
IA[5:0]
IA[5:0]
Spectrum
Spreader
Clock
Doubler
Pulse Width
Modulation
PWM[3:0]
Quadrature
Decoder
QD1A, QD1B
QD2A, QD2B
AQD1A, AQD1B
AQD2A, AQD2B
Input
Capture
PC[7,5,3,1]
PD[7,5,3,1]
PF[7,5,3,1]
PG[7,5,3,1]
IrDA Bootstrap