Jameco Electronics 3000 User Manual
User’s Manual
253
ADD IY,yy 4 f - - - * IY = IY + yy -- yy=BC,
DE, IY, SP
ADD SP,d 4 f - - - * SP = SP + d -- d=0 to 255
AND HL,DE 2 fr * * L 0 HL = HL & DE
AND IX,DE 4 f * * L 0 IX = IX & DE
AND IY,DE 4 f * * L 0 IY = IY & DE
BOOL HL 2 fr * * 0 0 if (HL != 0) HL = 1,
set flags to match HL
BOOL IX 4 f * * 0 0 if (IX != 0) IX = 1
BOOL IY 4 f * * 0 0 if (IY != 0) IY = 1
DEC IX 4 - - - - IX = IX - 1
DEC IY 4 - - - - IY = IY - 1
DEC ss 2 r - - - - ss = ss - 1 -- ss= BC,
DE, HL, SP
INC IX 4 - - - - IX = IX + 1
INC IY 4 - - - - IY = IY + 1
INC ss 2 r - - - - ss = ss + 1 -- ss= BC,
DE, HL, SP
MUL 12 - - - - HL:BC = BC * DE, signed
32 bit result. DE unchanged
OR HL,DE 2 fr * * L 0 HL = HL | DE -- bitwise or
OR IX,DE 4 f * * L 0 IX = IX | DE
OR IY,DE 4 f * * L 0 IY = IY | DE
RL DE 2 fr * * L * {CY,DE} = {DE,CY} --
left shift with CF
RR DE 2 fr * * L * {DE,CY} = {CY,DE}
RR HL 2 fr * * L * {HL,CY} = {CY,HL}
RR IX 4 f * * L * {IX,CY} = {CY,IX}
RR IY 4 f * * L * {IY,CY} = {CY,IY}
SBC HL,ss 4 fr * * V * HL=HL-ss-CY
(cout if (ss-CY)>hl)
19.10 8-bit Arithmetic and Logical Ops
Instruction clk A I S Z V C Operation
ADC A,(HL) 5 fr s * * V * A = A + (HL) + CF
ADC A,(IX+d) 9 fr s * * V * A = A + (IX+d) + CF
ADC A,(IY+d) 9 fr s * * V * A = A + (IY+d) + CF
ADC A,n 4 fr * * V * A = A + n + CF
ADC A,r 2 fr * * V * A = A + r + CF
ADD A,(HL) 5 fr s * * V * A = A + (HL)
ADD A,(IX+d) 9 fr s * * V * A = A + (IX+d)
ADD A,(IY+d) 9 fr s * * V * A = A + (IY+d)
ADD A,n 4 fr * * V * A = A + n
ADD A,r 2 fr * * V * A = A + r
AND (HL) 5 fr s * * L 0 A = A & (HL)
AND (IX+d) 9 fr s * * L 0 A = A & (IX+d)
AND (IY+d) 9 fr s * * L 0 A = A & (IY+d)
AND n 4 fr * * L 0 A = A & n
AND r 2 fr * * L 0 A = A & r
CP* (HL) 5 f s * * V * A - (HL)
CP* (IX+d) 9 f s * * V * A - (IX+d)
CP* (IY+d) 9 f s * * V * A - (IY+d)