Jameco Electronics 3000 User Manual

This chapter describes the various capabilities of the Rabbit that
may not be obvious from the technical description.

The Rabbit can output precise pulses under software control. The effect of interrupt latency 
is avoided because the interrupt always prepares a future pulse edge that is clocked into 
the output registers on the next clock. This is shown in Figure 4-1.

The timer output in Figure 4-1 is periodic. As long as the interrupt routine can be com-
pleted during one timer period, an arbitrary pattern of synchronous pulses can be output 
from the parallel port.

The interrupt latency depends on the priority of the interrupt and the amount of time that 
other interrupt routines of the same or higher priority inhibit interrupts. The first instruc-
tion of the interrupt routine will start executing within 30 clocks of the interrupt request 
for the highest priority interrupt routine. This includes 19 clocks for the longest instruction 
to complete execution and 10 clocks for the interrupt to execute. Pushing registers requires 
10–12 clocks per 16-bit register. Popping registers requires 7–9 clocks. Return from inter-
rupt requires 7 clocks. If three registers are saved and restored, and 20 instructions averag-
ing 5 clocks are executed, an entire interrupt routine will require about 200 clocks, or 10 
µs with a 20 MHz clock. Given this timing, the following capabilities become possible.

Latency

Interrupt 
routine sets 

Timer Output

Parallel Port Output

Timer Output

Parallel Port Output

Setup Register