Jameco Electronics 3000 User Manual
User’s Manual
79
7. M
ISCELLANEOUS
F
UNCTIONS
7.1 Processor Identification
Four read-only registers are provided to allow software to identify the Rabbit micropro-
cessor and recognize the features and capabilities of the chip. Five bits in each of these
registers are unique to each version of the chip. One register is reserved for the on-chip
flash memory configuration (GROM), one register is reserved for the on-chip RAM mem-
ory configuration (GRAM), one register identifies the CPU (GCPU), and the final register
is reserved for revision identification (GREV). The Rabbit 3000 does not contain on-chip
SRAM or flash memories.
cessor and recognize the features and capabilities of the chip. Five bits in each of these
registers are unique to each version of the chip. One register is reserved for the on-chip
flash memory configuration (GROM), one register is reserved for the on-chip RAM mem-
ory configuration (GRAM), one register identifies the CPU (GCPU), and the final register
is reserved for revision identification (GREV). The Rabbit 3000 does not contain on-chip
SRAM or flash memories.
Table 7-1. Global ROM Configuration Register
Global ROM Configuration Register
(GROM)
(Address = 0x2C)
Bit(s)
Value
Description
7
0
Program fetch as a function of the SMODE pins.
(read only)
1
Ignore the SMODE pins program fetch function.
6:5
read
These bits report the state of the SMODE pins.
4:0
00000
ROM identifier for this version of the chip.
Table 7-2. Global RAM Configuration Register
Global RAM Configuration Register
(GRAM)
(Address = 0x2D)
Bit(s)
Value
Description
7
0
Program fetch as a function of the SMODE pins.
(read only)
1
Ignore the SMODE pins program fetch function.
6:5
read
These bits report the state of the SMODE pins.
4:0
00000
RAM identifier for this version of the chip.