Hitachi 9900 User Manual

The main components that make up the Lightning 9900 V Series systems are the

Array Control Processor modules (ACPs) and Host Adapter modules, called Channel Host
Interface Processors (CHIPs). These elements enable the unsurpassed bandwidth of the Hi-
Star network by bringing their own network paths (and bandwidth) to the Cache
Hierarchical Star Network (C-HSN) and the Control Memory Hierarchical Star Network
(CM-HSN). This means that the full 15.9GB/sec internal bandwidth is available with a
fully configured Lightning 9980V system with all four ACP pairs (eight modules total) and
all four CHIP pairs (eight modules total). This is a truly high-performance and cost-
effective configuration. With any Lightning 9900 V Series configuration, growing or scaling
can be easily completed by adding more CHIP pairs for connectivity or ACP pairs for more
capacity or performance. The internal bandwidth increases every time components are
added. The bandwidths stated are the rated bandwidths for the paths; the effective rates will
vary based on application workload and bandwidth consumption.

Although two ACP pairs are allowed for the Lightning 9970V system, more than one

pair is rarely needed except for scientific applications requiring massive bandwidth of raw
data from disk.

Unlike the shared-bus architecture of some competitive products (as shown in Figure

3), Hi-Star internally switched architecture is designed to truly scale in both capacity and
performance and does not have to contend for limited bus bandwidth.

The Lightning 9900 V Series was designed with maximum emphasis on high-

availability computing for today’s most critical enterprises. Chapter 7 discusses some of the
many advantages in high-availability design that the Lightning 9900 V Series has over
competitive products including:

•

System microcode which can be upgraded nondisruptively

•

Active/active dual-ported disk drives instead of single-port active drives

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