Intel 7xx Servers User Manual

Page of 368
20.5 POWER6 520 Memory Considerations
Because of the design of the Power6 520 system, there are some key factors with the memory
subsystem that one should keep in mind when sizing this system.  The Power6 520, unlike the Power6
570, has no L3 cache, which does have an effect on memory sensitive workloads, like Java applications
for instance.  Having no L3 cache makes memory speed, or the 
bandwidth rating in megabytes per
second
,  even more critical for memory sensitive workloads.  The Power6 520 has 8 memory DIMM
slots, which are positioned in groups of four behind each of the Power6-SCM modules and each group of
four will be referred to as a quad for this discussion.  The available number of active memory slots
depends on the Processor Feature Code of the system.  
When only one SCM module is installed, only one quad of memory is active and all slots must
contain DIMMs of the same size and speed.  When two SCM modules are installed (except in the case of
the 4-way capable Capacity-on-Demand model with only one module enabled, which activates both
memory quads), both quads of memory are active.  When both are active, it is important to note that the
first and second modules are separate and independent.  So this means that even though the size and speed
of memory DIMMs behind each module have to be the same, the size and speed of memory DIMMs
behind the first module do not have to match the memory DIMMs behind the second module.  For
DIMMs ranging from 512 MB to 4 GB, the speed is 667 Mbps (
PC2-5300
).  The 8 GB DIMMs are
different however, with a speed of 400 Mbps (
PC2-3200
).  This decrease in speed for 8 GB DIMMs can
have a negative effect on performance with memory sensitive workloads.  This effect, along with the fact
that there is no L3 cache, should be considered when planning for current and future growth and also
LPAR configurations.
To test the  performance difference of 4 GB DIMMs versus 8 GB DIMMs (essentially testing the
difference in speed) and what occurs when the DIMMs of different sizes are “mixed”, we used a Power6
520 (9408-M25) F/C 5635 (a fully enabled system) with one partition using all the available resources.
“Mixed” here means the DIMMs in one quad behind a module are 4 GB and the DIMMs in the opposite
quad are 8 GB.  We started with a baseline consisting of all 4 GB DIMMs behind both modules, which is
the best performing case.  Then switched to all 8 GB DIMMs behind both modules and ran the same tests
again.  The performance of the workloads that were memory sensitive followed suit with the decrease in
memory speed, which was expected.  This is very important to consider when considering the amount of
memory needed for a system.  Deciding to go with the larger capacity 8 GB DIMMs does reduce your
memory’s speed and can have a negative performance effect on your workload.  Of course each workload
will behave differently based on its sensitivity to memory.  
Next we placed 4 GB DIMMs behind one module and 8 GB DIMMs behind the opposite module.
Because the one module had the faster 4 GB DIMMs behind it, the same workloads produced results that
ranged between the best case, all 4 GB DIMMs, and the worst case, all 8 GB DIMMs.   Again, we used
only one partition that utilized all the available resources, but there are other factors to consider when
using LPAR.  
LPAR, or Logical Partitioning, increases flexibility, enabling selected system resources like
processors, memory and I/O components to be utilized by various partitions, either in a shared or
dedicated environment, on the same system.  In the “mixed” environment previously described, it is
possible to have one partition utilizing memory on 4 GB DIMMs and a second partition, configured  with
exactly the same amount of resources, utilizing memory on 8 GB DIMMs.  This can cause an application
to have different performance characteristics on the partitions.  It is also possible for partitions to be
assigned a mix of memory from different DIMMs, depending on how the memory is allocated at partition
IBM i 6.1 Performance Capabilities Reference - January/April/October 2008
©
 Copyright IBM Corp. 2008
 Chapter 20 - General Tips and Techniques
323