Fujitsu CM71-00101-5E User Manual
145
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.51
ASR (Arithmetic Shift to the Right Direction)
Makes an arithmetic right shift of the word data in "Ri" by "u4" bits, stores the result to
"Ri".
"Ri".
■
ASR (Arithmetic Shift to the Right Direction)
Assembler format:
ASR #u4, Ri
Operation:
Ri >> u4
→
Ri
Flag change:
N: Set when the MSB of the operation result is "1", cleared when the MSB is "0".
Z: Set when the operation result is "0", cleared otherwise.
V: Unchanged
C: Holds the bit value shifted last. Cleared when the shift amount is "0".
Execution cycles:
1 cycle
Instruction format:
Example:
ASR #8, R3
N
Z
V
C
C
C
–
C
MSB
LSB
1
0
1
1
1
0
0
0
u4
Ri
R3
R3
F F F F 0 F F F
F F 0 F F F F F
N Z V C
CCR
CCR
N Z V C
1 0 0 1
0 0 0 0
Instruction bit pattern :
1011 1000 1000 0011
Before execution
After execution