Fujitsu CM71-00101-5E User Manual
174
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.78
STH (Store Half-word Data in Register to Memory)
Stores the half-word data in "Ri" to memory address "(R14 + o8 × 2)".
The value "o8" is a signed calculation.
The value "o8" is a signed calculation.
■
STH (Store Half-word Data in Register to Memory)
Assembler format:
STH Ri, @(R14, disp9)
Operation:
Ri
→
( R14 + o8 × 2)
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
a cycle(s)
Instruction format:
Example:
STH R3, @(R14, 2)
N
Z
V
C
–
–
–
–
MSB
LSB
0
1
0
1
Ri
o8
12345678
R3
R3
0 0 0 0
4 3 2 1
4 3 2 1
12345678
1234567A
1234567A
1 2 3 4
5 6 7 8
0 0 0 0
4 3 2 1
R14
1 2 3 4
5 6 7 8
R14
Instruction bit pattern :
0101 0000 0001 0011
x x x x
Memory
Memory
Before execution
After execution