Intel SE7501WV2 User Manual
BIOS
Intel® Server Board SE7501WV2 TPS
Revision
1.0
Intel reference number C25653-001
122
Field
IPMI Definition
BIOS Specific Implementation
Event Data 3
7:0 OEM code 3 or unspecified
For format rev 0, if this byte is specified, it contains bits 15:8
of the POST code at the time FRB-2 reset occurred (port 81
code). If the BIOS only uses one byte POST codes, this byte
will always be zero.
of the POST code at the time FRB-2 reset occurred (port 81
code). If the BIOS only uses one byte POST codes, this byte
will always be zero.
The following table provides examples of the event data fields for FRB-2 errors.
Table 58. Examples of Event Data Field Contents for FRB-2 Errors
Error type
Event Data 1
Event Data 2
Event Data 3
FRB-2 error, failing POST code information not available
0x03
0xFF
0xFF
FRB-2 error, BIOS uses 1-byte POST codes. The last POST
code before FRB-2 reset was 0x60.
code before FRB-2 reset was 0x60.
0xA3 0x60 0x0
FRB-2 error, BIOS uses 1-byte POST codes. The last POST
code before FRB-2 reset was 0x1942.
code before FRB-2 reset was 0x1942.
0xA3 0x42 0x19
6.41 POST Codes, Error Messages, and Error Codes
The BIOS indicates the current testing phase during POST by writing a hex code to the
Enhanced Diagnostic LEDs. See Table 25 for a list of supported POST progress codes. If errors
are encountered, error messages or codes will either be displayed to the video screen, or if an
error has occurred prior to video initialization, errors will be reported through a series of audio
beep codes. POST errors are logged in to the System Event Log.
Enhanced Diagnostic LEDs. See Table 25 for a list of supported POST progress codes. If errors
are encountered, error messages or codes will either be displayed to the video screen, or if an
error has occurred prior to video initialization, errors will be reported through a series of audio
beep codes. POST errors are logged in to the System Event Log.
The error codes are defined by Intel and whenever possible are backward compatible with error
codes used on earlier platforms.
codes used on earlier platforms.
6.41.1
POST Progress Code LEDs
The SE7501WV2 provides LEDs to display POST progress codes. The purpose of the POST
Progress Code LEDs is to provide a troubleshooting tool in the event of a system hang during
POST. The LEDs will display the hex POST code for the last test the BIOS performed before
the system hung.
Progress Code LEDs is to provide a troubleshooting tool in the event of a system hang during
POST. The LEDs will display the hex POST code for the last test the BIOS performed before
the system hung.
The POST Progress Code LED feature consists of a hardware decoder and four dual color LEDs
located on the back of the baseboard. During POST, the LEDs will display all normal POST
progress codes representing the progress of the BIOS POST. Each code will be represented by
a combination of colors from the four LEDs. The LEDs are in pairs of green and red. The POST
progress codes are broken into two nibbles, an upper and a lower nibble. Each bit in the upper
nibble is represented by a red LED and each bit in the lower nibble is represented by a green
LED. If both bits are set in the upper and lower nibble then both red and green LEDs are lit,
resulting in an amber color. Likewise, if both bits are clear then the red and green LEDs are off.
located on the back of the baseboard. During POST, the LEDs will display all normal POST
progress codes representing the progress of the BIOS POST. Each code will be represented by
a combination of colors from the four LEDs. The LEDs are in pairs of green and red. The POST
progress codes are broken into two nibbles, an upper and a lower nibble. Each bit in the upper
nibble is represented by a red LED and each bit in the lower nibble is represented by a green
LED. If both bits are set in the upper and lower nibble then both red and green LEDs are lit,
resulting in an amber color. Likewise, if both bits are clear then the red and green LEDs are off.