Intel SE7501WV2 User Manual

 

The SE7501WV2 server management features are implemented using the Sahalee server 
board management controller chip. The Sahalee BMC is an ASIC packaged in a 156-pin BGA 
that contains a 32-bit RISC processor core and associated peripherals. The following diagram 
illustrates the SE7501WV2 server management architecture.  

BASEBOARD

PROCESSOR SOCKETS

SMS

I/F

System Bus

5V

12V

3.3V

-12V

Po

w

er

 Bu

tto

n

Fr

ont

 P

anel

 NMI

 S

w

itc

h

IERR (2)

Thermal Trip (2)

- Chassis ID
- Baseboard ID
- Power State

NMI

Chip set NMIs

Chip set SMI

CPU Voltage (2)

INTELLIGENT PLATFORM
MANAGEMENT BUS (IPMB)

R

es

et Bu

tto

n

C

hass

is

 I

nt

rusi

on

P

ow

er Connec

to

r

To Power

Distribution

Board

P

riv

at

e Management

 B

us

se

s

RAM

CODE

(updateable)

SMI

Platform

Management

Interrupt

Routing

Non-volatile, read-write storage

SENSOR

DATA

RECORDS

SYSTEM

EVENT

LOG

FRU INFO

& CONFIG

DEFAULTS

SMM-

BIOS

I/F

CO

M

 2

BBD COM2

CPU 'Core' Temp (2)

EMP

DIMM SPD (6)

Po

w

er

 L

E

D

Faul

t S

tat

us

 LE

D

FANs (6)

N

et

w

or

k Ac

tiv

ity

 L

E

Ds

PCI PME

BASEBOARD

MANAGEMENT

CONTROLLER

(BMC)

System I/F

PORTS

Chip Set 1.2V

3.3V Standby

LVDS-B Term. 1

LVDS-A Term. 2

LVDS-A Term. 1

LVDS-B Term. 2

D

riv

e Ac

tiv

ity

/Fa

ul

t 

LE

D

Sy

st

em

 Id

en

tify

 Bu

tto

n

NIC #1

NIC #2

RI (Wake-on-Ring)

Chassis

Intrusion

Hot-swap

Backplane

Header

Aux. IPMB

Connector

Chip Set

ICMB

Transceiver

Header

Front Panel Connectors

Logic 2.5V

CO

M

2

S

yst

em I

dent

ify

 LE

D

CPU Present (2)

ATA Board

FRU Replacement LEDs

(6)

(2)

FRU Info

Temperature

Sensor

(6)

FAN Pack
Connector

(5)

FAN FRU LEDs are driven by the
baseboard, but the actual LEDs are
off-board, typically located near the
corresponding fans.

BBD COM1

COM1

'debug'

Header

C

O

MM MU

X

GTL 1.25V

Baseboard

Temp 1