Intel PCI User Manual
358
Software Developer’s Manual
Register Descriptions
13.7.43
Total Packets Received
TPR (040D0h; R)
This register counts the total number of all packets received. All packets received are counted in
this register, regardless of their length, whether they have errors, or whether they are flow control
this register, regardless of their length, whether they have errors, or whether they are flow control
packets. This register only increments if receives are enabled.
Table 13-132. TPR Register Bit Description
13.7.44
Total Packets Transmitted
TPT (040D4h; R)
This register counts the total number of all packets transmitted. All packets transmitted are counted
in this register, regardless of their length, or whether they are flow control packets.
Partial packet transmissions (collisions in half-duplex mode) are not included in this register. This
register only increments if transmits are enabled. This register counts all packets, including
register only increments if transmits are enabled. This register counts all packets, including
standard packets, secure packets, packets received over the SMBus
1
, and packets generated by the
ASF function.
Table 13-133. TPT Register Bit Description
31
0
TPR
Field
Bit(s)
Initial
Value
Value
Description
TPR
31:0
0b
Number of all packets received.
1.
The 82544GC/EI and the 82541ER do not support SMBus or ASF functionality.
31
0
TPT
Field
Bit(s)
Initial
Value
Value
Description
TPT
31:0
0b
Number of all packets transmitted.