Mitsubishi Electronics FX3G User Manual
293
FX
3S
/FX
3G
/FX
3GC
/FX
3U
/FX
3UC
Series
Programming Manual - Basic & Applied Instruction Edition
11 Rotation and Shift Operation – FNC 30 to FNC 39
11.1 FNC 30 – ROR / Rotation Right
11
FN
C30
-FN
C3
C30
-FN
C3
9
R
ota
tion and
Shi
ft
ft
12
FN
C40-FN
C40-FN
C49
D
ata O
perati
perati
on
13
FNC
50-FNC
59
High-Speed
Proc
essing
14
FM
C60-FN
C60-FN
C69
H
andy
In
struction
15
FN
C70-FN
C70-FN
C79
E
xternal
F
X
I/O
De
vice
16
FNC
80-FNC
89
External
FX
Dev
ice
ice
17
FNC1
00-
FNC10
00-
FNC10
9
Dat
a
a
Transfer 2
18
FNC1
10-
FNC139
FNC139
Fl
oati
ng Poi
nt
19
FNC14
0-F
N
C
149
Da
ta
Operation 2
20
FNC1
50-
FNC159
FNC159
Pos
itioning
itioning
Control
11.1
FNC 30 – ROR / Rotation Right
Outline
This instruction shifts and rotates the bit information rightward by the specified number of bits without the carry flag.
1. Instruction format
2. Set data
*1.
Do not set a negative value to the number of bits to be rotated.
3. Applicable devices
S1: In 16-bit operations, K4Y
, K4M
and K4S
are valid.
In 32-bit operations, K8Y
, K8M
and K8S
are valid.
S2: This function is supported only in FX
3G
/FX
3GC
/FX
3U
/FX
3UC
PLCs.
S3: This function is supported only in FX
3U
/FX
3UC
PLCs.
Explanation of function and operation
1. 16-bit operation (ROR and RORP)
"n" bits out of 16 bits of
are rotated rightward.
• The final bit is stored in the carry flag (M8022).
• In a device with digit specification, K4 (16-bit instruction) is valid.
• In a device with digit specification, K4 (16-bit instruction) is valid.
Operand Type
Description
Data Type
Word device number storing data to be rotated rightward
16- or 32-bit binary
n
Number of bits to be rotated
[n
[n
≤ 16 (16-bit instruction), n ≤ 32 (32-bit instruction)]
*1
16- or 32-bit binary
Oper-
and
Type
Bit Devices
Word Devices
Others
System User
Digit Specification
System User
Special
Unit
Index
Con-
stant
stant
Real
Number
Charac-
ter String
Pointer
X Y M T C S D .b KnX KnY KnM KnS T C D
R
U \G
V Z Modify K H
E
" "
P
S
1
S
1
S
1
S
2
S
3
n
S
2
P
FNC 30
ROR
D
16-bit Instruction
5 steps
Mnemonic
Operation Condition
Continuous
Operation
Pulse (Single)
Pulse (Single)
Operation
ROR
RORP
DROR
DRORP
Mnemonic
Operation Condition
32-bit Instruction
9 steps
Continuous
Operation
Pulse (Single)
Pulse (Single)
Operation
D
D
D
Command
input
FNC 30
RORP
RORP
n
D
0
0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
0
Carry flag
M8022
High order
Low order
b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Before shift
b3 to b0
Before shift
b15 to b4
After the
instruction
is executed
once
High order
1 1 1 1 1 1 1 1 0 0 0 0
0
0 0 0
Low order
M8022
"n" bits (in the case of K4)
b15b14b13b12b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Before
execution
After
execution
Rightward
rotation
"n" bits
The status of the bit "n
−1" is
copied.
Carry flag
"n
−1" bits
b0 to b3 (n
−1) are moved.
The contents of
b3 are stored.