Mitsubishi Electronics FX3G User Manual

FX

3S

/FX

3G

/FX

3GC

/FX

3U

/FX

3UC

 Series

Programming Manual - Basic & Applied Instruction Edition

13 High-Speed Processing – FNC 50 to FNC 59

This instruction reads matrix input as 8-point input 

× "n"-point output (transistor) in the time division method.

An input signal of 8 points 

× "n" columns is controlled in the time division method using 8 inputs 

 and "n"

transistor outputs 

. Each column is read in turn, and then output to 

.

• For each output, the I/O processing is executed immediately in turn in interrupt at every 20 ms under consideration 

of the input filter response delay of 10 ms.

Input device (X) number of matrix signal input
X000, X010, X020 

… final input device number 

(Only "0" is allowed in the least significant digit of device numbers.)

Bit

Head device (Y) number of matrix signal output
Y000, Y010, Y020 

… final output device number 

(Only "0" is allowed in the least significant digit of device numbers.)

Bit

Head bit device (Y, M or S) number of ON output destination
Y000, Y010, Y020 

… final Y number, M000, M010, M020 … final M number or S000,

S010, S020 

… final S number

(Only "0" is allowed in the least significant digit of device numbers.)

Bit

n

Number of columns in matrix input (K2 to K8 or H2 to H8)

16-bit binary

System User

Digit Specification

System User

Special 

Unit

Index

Constant

Real 

Number

Charac-

ter String

Pointer

X

Y

M T C S D .b KnX KnY KnM KnS T C D R U \G

V Z Modify

K

H

E

" "

P

n

FNC 52

MTR

16-bit Instruction

9 steps MTR

Mnemonic

Operation Condition

Continuous

Operation

−

Mnemonic

Operation Condition

32-bit Instruction

S

D

1

D

2

S

D

1

D

2

S

D

1

D

2

Command

input

(normally ON)

FNC 52

MTR

n

S

D

1

D

2

Number

of

columns

Input

number

Output

number

ON

output

destination