Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Data Sheet

Product codes
P4X-UPE3210-316-6M1333
Page of 326
DRAM Controller Registers (D0:F0)
134
Datasheet
5.2.46
TSS—Thermal Sensor Status
B/D/F/Type:
0/0/0/MCHBAR
Address Offset: CDAh
Default Value:
00h
Access:
RO 
Size:
8 bits
This read only register provides trip point and other status of the thermal sensor.
All bits in this register are reset to their defaults by MPWROK.
Bit
Access
Default 
Value
Description
7
RO
0b
Catastrophic Trip Indicator (CTI): A 1 indicates that the internal thermal 
sensor temperature is above the catastrophic setting.
6
RO
0b
Hot Trip Indicator (HTI): A 1 indicates that the internal thermal sensor 
temperature is above the Hot setting.
5
RO
0b
Aux0 Trip Indicator (A0TI): A 1 indicates that the internal thermal sensor 
temperature is above the Aux0 setting.
4
RO
0b
Thermometer Mode Output Valid (TOV): A 1 indicates the Thermometer 
mode is able to converge to a temperature and that the TR register is reporting a 
reasonable estimate of the thermal sensor temperature. A 0 indicates the 
Thermometer mode is off, or that temperature is out of range, or that the TR 
register is being looked at before a temperature conversion has had time to 
complete.
3:2
RO
00b
Reserved 
1
RO
0b
Direct Catastrophic Comparator Read (DCCR): This bit reads the output of 
the Catastrophic comparator directly, without latching via the Thermometer 
mode circuit. Used for testing.
0
RO
0b
Direct Hot Comparator Read (DHCR): This bit reads the output of the Hot 
comparator directly, without latching via the Thermometer mode circuit. Used 
for testing.