Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Data Sheet

Product codes
P4X-UPE3210-316-6M1333
Page of 326
Datasheet
197
Intel Manageability Engine Subsystem PCI (D3:F0,F3)
7.1.9
HECI_MBAR—HECI MMIO Base Address
B/D/F/Type:
0/3/0/PCI
Address Offset: 10–17h
Default Value:
0000000000000004h
Access:
RO, RW 
Size:
64 bits
7.1.10
SS—Sub System Identifiers
B/D/F/Type:
0/3/0/PCI
Address Offset: 2C–2Fh
Default Value:
00000000h
Access:
RWO 
Size:
32 bits
Bit
Access
Default 
Value
Description
63:4
RW
0000000
0000000
0h
Base Address (BA): Base address of register memory space. 
3
RO
0b
Prefetchable (PF): Indicates that this range is not pre-fetchable 
2:1
RO
10b
Type (TP): Indicates that this range can be mapped anywhere in 64-bit address 
space. 
0
RO
0b
Resource Type Indicator (RTE): Indicates a request for register memory 
space. 
Bit
Access
Default 
Value
Description
31:16
RWO
0000h
Subsystem ID (SSID): Indicates the sub-system identifier. This field should be 
programmed by BIOS during boot-up. Once written, this register becomes Read 
Only. This field can only be cleared by PLTRST#. 
15:0
RWO
0000h
Subsystem Vendor ID (SSVID): Indicates the sub-system vendor identifier. 
This field should be programmed by BIOS during boot-up. Once written, this 
register becomes Read Only. This field can only be cleared by PLTRST#.