Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Data Sheet

Product codes
P4X-UPE3210-316-6M1333
Page of 326
Datasheet
315
Testability
13
Testability
In the MCH, testability for Automated Test Equipment (ATE) board level testing has 
been implemented as an XOR chain. An XOR-tree is a chain of XOR gates each with one 
input pin connected to it which allows for pad to ball to trace connection testing.
The XOR testing methodology is to boot the part using straps to enter XOR mode (A 
description of the boot process follows). Once in XOR mode, all of the pins of an XOR 
chain are driven to logic 1. This action will force the output of that XOR chain to either 
a 1 if the number of the pins making up the chain is even or a 0 if the number of the 
pins making up the chain is odd.
Once a valid output is detected on the XOR chain output, a walking 0 pattern is moved 
from one end of the chain to the other. Every time the walking 0 is applied to a pin on 
the chain, the output will toggle. If the output does not toggle, there is a disconnect 
somewhere between die, package, and board and the system can be considered a 
failure. 
13.1
XOR Test Mode Initialization
Figure 16.
XOR Test Mode Initialization Cycles
PWROK
RSTIN#
STRAP PINS
HCLKP/GCLKP
HCLKN/GCLKN
XOR inputs
XOR output
CL_PWROK
X
CL_RST#