Intel Xeon Wolfdale E3210 P4X-UPE3210-316-6M1333 Data Sheet

Product codes

P4X-UPE3210-316-6M1333

Datasheet

DRAM Controller Registers (D0:F0)

5.1.31

BSM—Base of Stolen Memory

B/D/F/Type:

0/0/0/PCI

Address Offset: A4–A7h

Default Value:

00000000h

Access:

RW/L, RO

Size:

32 bits

This register contains the base address of stolen DRAM memory. BIOS determines the

base of stolen memory by subtracting the stolen memory size (PCI Device 0 offset 52

bits [6:4]) from TOLUD (PCI Device 0 offset B0 bits [15:04]).

Note: This register is locked and becomes Read Only when the D_LCK bit in the SMRAM

5.1.32

TSEGMB—TSEG Memory Base

B/D/F/Type:

0/0/0/PCI

Address Offset: AC–AFh

Default Value:

00000000h

Access:

RO, RW/L

Size:

32 bits

This register contains the base address of TSEG DRAM memory. BIOS determines the

base of TSEG memory by subtracting the TSEG size (PCI Device 0 offset 9E bits [2:1])

from stolen base (PCI Device 0 offset A4 bits [31:20]).

Once D_LCK has been set, these bits becomes read only.

Bit

Access

Default

Value

Description

31:20

RW/L

000h

Base of Stolen Memory (BSM): This register contains bits 31 to 20 of the base
address of stolen DRAM memory. BIOS determines the base of stolen memory
by subtracting the stolen memory size (PCI Device 0, offset 52h, bits 6:4) from
TOLUD (PCI Device 0, offset B0h, bits 15:4).
NOTE: This register is locked and becomes Read Only when the D_LCK bit in the

SMRAM register is set.

19:0

00000h Reserved