Enterasys mrx Installation Instruction
REQUIREMENTS/SPECIFICATIONS
Page 2-7
2.4 OPERATING SPECIFICATIONS
The operating specifications for the Cabletron Systems’ HUB are
described in this section. Cabletron Systems reserves the right to
change these specifications at any time without notice.
described in this section. Cabletron Systems reserves the right to
change these specifications at any time without notice.
GENERAL
MRXI/MRXI-2 Only
Packet Buffer Memory (RAM): 64 KB
Internal Processor:
Intel 80186 operating at 10 MHz
Ethernet Controller:
National Semiconductor DP8390
Static RAM:
128 KB
EPROM:
256 KB
MRX/MRX-2 and MRXI/MRXI-2
Delay Times:
In
Out
Delay Typ.
Start of Packet:
Twisted Pair
SPIM
1000 nsec.
Twisted Pair
Twisted Pair 1000 nsec.
SPIM
SPIM
1300 nsec.
SPIM
Twisted Pair 1300 nsec.
JAM:
Twisted Pair
SPIM
700 nsec.
Twisted Pair
Twisted Pair 700 nsec.
SPIM
Twisted Pair 1000 nsec.
Preamble:
Input:
Minimum of 20 bits required.
Output:
64 bits min. (last 2 bits are 1, 1).
JAM Output:
Collisions are propagated through the
network using the JAM signal of an
alternating pattern of 1’s and 0’s in
accordance with 802.3 specifications for
a repeater unit.
network using the JAM signal of an
alternating pattern of 1’s and 0’s in
accordance with 802.3 specifications for
a repeater unit.