Intel Xeon 7130N LF80550KF0878M Data Sheet

17

V

CCA

, V

CCIOPLL

 are power sources required by the PLL clock generators on the Dual-Core 

Intel Xeon processor 7000 series. These are analog PLLs and they require low noise power 
supplies for minimum jitter. These supplies must be low pass filtered from V

TT

.

The AC low-pass requirements, with input at V

TT

, are as follows:

•

< 0.2 dB gain in pass band

•

< 0.5 dB attenuation in pass band < 1 Hz

•

> 34 dB attenuation from 1 MHz to 66 MHz

•

> 28 dB attenuation from 66 MHz to core frequency

The filter requirements are illustrated in 

. For recommendations on implementing the 

filter, refer to the appropriate platform design guide.

NOTES: 

1. Diagram not to scale.
2. No specification for frequencies beyond f

core 

(core frequency).

3. f

peak

, if existent, should be less than 0.05 MHz.

4. f

core

 represents the maximum care frequency supported by the platform.

The VID[5:0] pins supply the encodings that determine the voltage to be supplied by the V

CC

 (the 

core voltage for the Dual-Core Intel Xeon processor 7000 series) voltage regulator. The VID 
specification for the Dual-Core Intel Xeon processor 7000 series is defined by the Vcc Voltage 
Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 10.2 Design 
Guidelines. The voltage set by the VID pins is the maximum V

CC

 voltage allowed by the 

0 dB

-28 dB

-34 dB

0.2 dB

-0.5 dB

1 MHz

66 MHz

1 Hz

DC

passband

high frequency

band