Nokia n-gageqd Service Manual

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RH-29
Company Confidential
7 - System Module
Nokia Customer Care
Page 10
         Copyright ©
 2004 Nokia Corporation
Issue 1  05/2004
Company Confidential
are illustrated in following figure.
Bluetooth uses 26 MHz clock.
Figure 2: RH-29 Clocking. 
In SLEEP mode the VCXO is off. UEM generates low frequency clock signal (32.768 kHz) 
that is fed to UPP_WD2, Bluetooth and ZOCUS. 
UPP_WD2 voltage/clock frequency adjusting
No external clock is available for UPP_WD2 before VCXO starts. As reset is released, the 
VCXO is running and MCU uses the 26 MHz clock while DSP is in reset. There are three 
identical DPLL's, for MCU, for DSP and for accessory interfaces, which can be controlled 
independently. The clock for MCU can be up to 104 MHz and 117 MHz is maximum clock 
Frequency for the DSP. These clock signals are used either directly (SDRAM IF) or divided 
down for the interfaces (e.g. flash IF).
Power distribution, control and reset
All power (except backup battery power) is drawn from the BL6-C Li-Ion battery located 
in the B cover. Current flows through ZOCUS current sense resister which is used for cur-
rent measurement by ZOCUS and thus for remaining operating time estimation.
1BQ board contains one power ASIC, UEM and discrete regulators needed for generating 
the different operating voltages. The discrete regulators consist of an step-down DC-DC 
converter to power UPPWD2 voltage core and a step-up DC-DC converter for display 
module backlighting. The keyboard backlighting is powered with a discrete driver. 
Power-up sequence (reset mode)
RESET mode can be entered in four ways: by inserting the battery or charger, by RTC 
alarm or by pressing the power key. The VCXO is Powered by UEM. After a 220 ms delay 
regulators are configured and UEM enters PWR_ON mode and system reset PURX is