Clevo 2200c 2700c sager np2280 Service Manual

Page of 101
B - 3
Schematic Diagrams
71-22C00-D02
2.0
CLOCK GENERATOR
Custom
3
31
0200-03.SCH
Monday, March 05, 2001
T itle
Size
Document Number
Rev
Date:
Sheet
of
ÂÅ ¤ Ñ ¹q ¸£        CLEVO CO.
VCC3
V CC3
VCC3
VCC3
VCC3
V_IO
VCC3
VCC3
MD44
(5,6)
MD43
(5,6)
MD42
(5,6)
MD41
(5,6)
CPUS TP#
(10)
PCISTP #
MEMCLK 4
(5)
MEMCLK 3
(5)
MEMCLK 2
(5)
MEMCLK 1
(5)
DCLK RE F (4)
PCLK80 P
(25)
AGP CLK 0
(7)
HCLK630S
(4)
HCLK CP U (1)
USB CLK
(10)
VOS CI
(7)
LPC14M
(20)
PCLKS IO
(21)
PCLK LP C (20)
PCLK TI
(16)
S DA_AT FF
(25)
S CL_AT FF
(25)
BSE L0
(1,2)
BSE L1
(1,2)
PCLK630S
(11)
PCLKP IC (1)
Z761
Z650
MD44
MD43
MD42
MD41
Z5 95
Z5 97
FS 3
Z5 94
Z5 96
FS 2
PCICLK3
FS3
SDRAM7
SDRAM5
SDRAM4
PCICLK4
REF1
PCICLK6
PCICLK2
SDRAM6
CPUCLK1
FS0
FS2
CPUCLK0
SDRAM3
PCICLK5
PCISTP #
CPUS TP#
FS1
MEMCLK 1
MEMCLK 2
SDRAM3
FS3
P CICLK 5
Z3 08
CPUCLK 0
SDRAM4
P CICLK 4
SDRA M_S TOP
PCLKP IC
MEMCLK 3
SDRAM5
P CICLK 2
FS2
DCLKRE F
Z310
FS1
CLK2.5V
CPUCLK 1
AGPCLK0
P CICLK 3
PCIS TP#
Z315
S DA _AT FF
Z3 97
FS0
SDRAM7
CPUST P#
SDRAM6
Z309
P CICLK 6
Z311
Z312
HCLKCP U
HCL K630 S
PCLK80P
VDDREF
PCLKS IO
VOS CI
Z3
3
MEMCLK 4
S CL _AT FF
RE F1
Z2
9
P CLKLP C
Z313
P CL K630 S
LP C14M
USB CL K
P CLKTI
FS 1
FS 0
B SE L0
B SE L1
SDRA M_STOP
Z761
Z650
Z8 55
R2 13
10K(R)
R2 23
10K(R)
R2 05
10K(R)
R2 22
10K(R)
RN64
8P 4R_ 2.7K
8
1
7
2
6
3
5
4
RN60
8P4 R_10 K
8
1
7
2
6
3
5
4
C447
10P(R)
C390
10P(R)
C425
10P
C420
10P
C445
10P
C440
10P(R)
C398
10P(R)
C422
10P(R)
C393
10P
C421
10P
C426
10P
C428
10P(R)
C439
10P(R)
C388
10P
C385
10P
C437
10P
R3 90
10K
R3 89
10K
C442
10P
C3 97
0.01U
C394
.1U
C4 27
0.01U
R3 48
33
TP1 72
C429
0.01U
C3 86
0.01U
C443
4.7U
R3 91
10K
R3 46
33
C4 38
.1U
C4 44
.1U
L 56
BEAD
R3 68
33
R3 41
10
R3 40
22
Y 6
14.318MHz_DIP
1
2
L 57
BEAD
TP1 65
C383
22P
C3 82
22P
R3 32
1 M
R3 67
33
R3 88
0
TP1 68
C3 96
.1U
TP1 73
R3 51
22
R3 81
33
C399
.1U
R3 69
22
C395
0.01U
R3 93
22
R3 52
22
C3 87
4.7U
R3 39
22
TP1 71
R3 50
33
R3 94
22
U26
ICS9248-135
1
48
2
3
4
5
42
7
8
9
11
12
13
10
36
22
16
26
25
30
23
24
15
20
21
33
41
40
39
38
37
19
35
34
32
31
29
28
27
44
43
45
46
47
14
17
6
18
VDDRE F
RE F1
FS3/RE F0
GNDRE F
X1
X2
VDD
FS1/P CICLK F
FS2/P CICLK 1
P CICLK 2
P CICLK 3
P CICLK 4
P CICLK 5
GNDP CI
VDD
GND
GND
FS 0/48MHZ
24_48/CP U2 .5_3 .3V #
VDD
SDAT A
SCLK
VDD
CPU_ST OP#
P CI_ST OP#
GND
SDRAM_F1
SDRAM_F0
GND
SDRAM7
SDRAM6
VDD
SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0
VDD
GNDL
CPUCLK 2
CPUCLK 1
CPUCLK F
VDDL CP U
P CICLK 6
SDRAM_ST OP #
VDDP CI
PD#
R3 92
22
R3 42
10
R3 47
33
C3 84
.1U
C4 41
.1U
C389
.1U
C446
.1U
R3 99
10K
R3 98
10K
R382
10K
R4 79
22(R)
R4 80
10K(R)
SW6
SW DIP-6
1
2
8
7
3
4
5
6
9
10
11
12
R5 23
1 K
R524
100K
1
0
0
1
1
1
1
0
1
CLOCK SELEC T
1
FS1
0
0
0
1
1
1
0
1
0
FS2
0
1
0
0
1
0
0
0
0
0
1
0
1
1
1
1
1
1
FS0
0
1
0
1
0
0
1
0
1
0
0
1
FS3
0
1
0
1
0
0
1
0
1
1
1
1
0
0
1
0
1
1
1
CPU
PCI
SDRAM
66
100
150
133
66.8
100
100
133
66.8
70
95
97
96.2
95
112
97
66.8
97
95
126.7
133
150
133.6
133
100
100
100
100
105
129.3
96.2
112
33.3
33.3
33.3
37.5
33.4
33.3
37.5
33.3
33.4
32.3
35
31.7
31.7
37.3
32.2
32.1
1/2
2/13
1/8
2/11
1/2
2/15
2/7
2/9
2/3
2/5
CPU RATIO SELEC T
Reserved
1/7
1/4
1/5
1/3
1/6
(NMI)
0
0
1
1
0
MD44
1
0
1
1
1
1
1
0
1
1
0
1
1
1
0
0
0
1
1
0
0
0
1
0
1
0
1
0
1
1
0
MD43
(INTR)
0
0
0
1
0
(A20M#)
0
0
1
0
1
1
0
0
1
1
MD42
0
1
1
1
1
1
1
1
0
0
0
1
0
1
0
1
0
(IGNNE#)
MD41
CLOSE TO CLOCK GENERATOR
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