orcad pspice User Manual
Bias point and DC sweep
385
Bias point and DC sweep
Power supply stepping
As previously discussed, PSpice uses a proprietary
algorithm which finds a continuous path from zero power
supplies levels to 100%. It starts at almost zero (.001%)
power supplies levels and works its way back up to the
100% levels. The minimum step size is 1e-6 (.0001%). The
first repeating series of the first step starts at zero for all
voltages.
algorithm which finds a continuous path from zero power
supplies levels to 100%. It starts at almost zero (.001%)
power supplies levels and works its way back up to the
100% levels. The minimum step size is 1e-6 (.0001%). The
first repeating series of the first step starts at zero for all
voltages.
Semiconductors
Model parameters
The first consideration for semiconductors is to avoid
physically unrealistic model parameters. Remember that
as PSpice steps the power supplies up it has to step
carefully through the turn on transition for each device. In
the diode example above, for the setting N=1e-6, the knee
of the I-V curve would be too sharp for PSpice to maintain
its continuity within the power supply step size limit of
1e-6.
physically unrealistic model parameters. Remember that
as PSpice steps the power supplies up it has to step
carefully through the turn on transition for each device. In
the diode example above, for the setting N=1e-6, the knee
of the I-V curve would be too sharp for PSpice to maintain
its continuity within the power supply step size limit of
1e-6.
Unguarded p-n junctions
A second consideration is to avoid “unguarded” p-n
junctions (no series resistance). The above diode example
also applies to the p-n junctions inside bipolar transistors,
MOSFETs (drain-bulk and source-bulk), JFETs and
GaAsFETs.
junctions (no series resistance). The above diode example
also applies to the p-n junctions inside bipolar transistors,
MOSFETs (drain-bulk and source-bulk), JFETs and
GaAsFETs.
Pspug.book Page 385 Wednesday, November 11, 1998 1:14 PM