UTStarcom MSG2000 User Manual

Preliminary

The PP50’s major subsystems are described in this section.

The RMI processor subsystem includes dual RMI XLR7xx BGA1605 CPU sites; a 

PP50 can support any CPU in any of those families with the proper assembly 

changes. See 

 for processor subsys-

tem details.

The RMI XLR processors support up to eight MIPS 64 bit RISC cores, each having 4 

individual execution threads for a total of 32 execution threads. 

See 

 for a reduced feature parts as list 

for this processor family. 

The PP50 supports reduced configurations based on these parts, but the default con-

figuration is two XLR732s fully populated devices.

FM2112/FM3112 (Fulcrum Microelectronics) Ethernet switch module, described in 

detail in 

. The onboard fabric 

Ethernet and base Ethernet switches facilitate connectivity. The fabric switch is a 

layer 2 device that provides 10GbE connectivity for the CPUs as well as multiple 

1GbE data paths. The base switch facilitates communication between the two XLR 

CPUs, IPMC controller and two base interfaces.

The PP50 supports a rear transition module (RTM) that includes a protected power 

supply, a management interface to the IPMC, ten 1GbE interfaces and two 10GbE 

interfaces.