Intel 1005M AW8063801121200 User Manual
Product codes
AW8063801121200
Datasheet, Volume 1
55
Power Management
4.2.2
Low-Power Idle States
When the processor is idle, low-power idle states (C-states) are used to save power.
More power savings actions are taken for numerically higher C-states. However, higher
C-states have longer exit and entry latencies. Resolution of C-states occur at the
thread, processor core, and processor package level. Thread-level C-states are
available if Intel
More power savings actions are taken for numerically higher C-states. However, higher
C-states have longer exit and entry latencies. Resolution of C-states occur at the
thread, processor core, and processor package level. Thread-level C-states are
available if Intel
®
HT Technology is enabled.
Caution:
Long term reliability cannot be assured unless all the Low Power Idle States are
enabled.
Entry and exit of the C-States at the thread and core level are shown in
While individual threads can request low power C-states, power saving actions only
take place once the core C-state is resolved. Core C-states are automatically resolved
by the processor. For thread and core C-states, a transition to and from C0 is required
before entering any other C-state.
take place once the core C-state is resolved. Core C-states are automatically resolved
by the processor. For thread and core C-states, a transition to and from C0 is required
before entering any other C-state.
Figure 4-2. Idle Power Management Breakdown of the Processor Cores
Figure 4-3. Thread and Core C-State Entry and Exit