Intel J1850 FH8065301455200 User Manual
Product codes
FH8065301455200
Datasheet
1003
PCU - Power Management Controller (PMC)
19.6.2
APM Register (APM)—Offset B2h
Access Method
Default: 00h
19.6.3
APM_STS Register (APM_STS)—Offset B3h
Access Method
Default: 00h
Type: I/O Register
(Size: 8 bits)
APM: B2h
7
4
0
0
0
0
0
0
0
0
0
apm_reg
Bit
Range
Default &
Access
Description
7:0
0b
RW
APM_Register (apm_reg): TBD
Type: I/O Register
(Size: 8 bits)
7
4
0
0
0
0
0
0
0
0
0
apm_sts
Bit
Range
Default &
Access
Description
7:0
0b
RW
APM_STS (apm_sts): Advanced Power Managment Status Port. used to pass data
between the OS and the SMI handler. Basically, this is scratchpad register and is not
effected by any other register or function (other than a PCI reset)