Atmel Evaluation Board using the SAM7SE Microcontroller AT91SAM7SE-EK AT91SAM7SE-EK Data Sheet

 6241B–ATARM–22-Mar-07

• Incorporates the ARM7TDMI

®

 ARM

®

 Thumb

®

 Processor

– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– EmbeddedICE

™

 In-circuit Emulation, Debug Communication Channel Support

• Internal High-speed Flash

– 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes 

Dual Plane (AT91SAM7SE512) 

– 256 Kbytes (AT91SAM7SE256) Organized in One Bank of 1024 Pages of 256 

Bytes Single Plane (AT91SAM7SE256)

– 32 Kbytes (AT91SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes 

Single Plane (AT91SAM7SE32)

– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 

ms

– 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, 

Flash Security Bit

– Fast Flash Programming Interface for High Volume Production

• 32 Kbytes (AT91SAM7SE512/256) or 8 Kbytes (AT91SAM7SE32) of Internal 

High-speed SRAM, Single-cycle Access at Maximum Speed

• One External Bus Interface (EBI)

– Supports SDRAM, Static Memory, Glueless Connection to CompactFlash

®

 and 

ECC-enabled NANDFlash

• Memory Controller (MC)

– Embedded Flash Controller
– Memory Protection Unit
– Abort Status and Misalignment Detection

• Reset Controller (RSTC)

– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout 

Detector

– Provides External Reset Signal Shaping and Reset Source Status

• Clock Generator (CKGR)

– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL

• Power Management Controller (PMC)